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Browse Prior Art Database

Opcode Compare Facility

IP.com Disclosure Number: IPCOM000103166D
Original Publication Date: 1990-Jul-01
Included in the Prior Art Database: 2005-Mar-17
Document File: 1 page(s) / 42K

Publishing Venue

IBM

Related People

Le, HQ: AUTHOR

Abstract

This facility provides the Processor Controller the capability to intercept an Opcode and perform the following tasks: 1. Fixing a problem due to instruction overlap execution on the test floor or in the field. 2. Re-routing instruction to Microcode on the test floor or in the field. 3. Allowing new instruction to be implemented in Microcode without hardware change.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 96% of the total text.

Opcode Compare Facility

      This facility provides the Processor Controller the capability
to intercept an Opcode and perform the following tasks:
1.   Fixing a problem due to instruction overlap execution on the
test floor or in the field.
2.   Re-routing instruction to Microcode on the test floor or in the
field.
3.   Allowing new instruction to be implemented in Microcode without
hardware change.

      A register (or a set of registers) 1 and a control register (or
a set of control registers) 2 are loaded by the Processor Controller
with Opcodes and control values.  These registers are called Opcode
Compare Registers and Opcode Compare Control Registers.  At decode
time, the instruction being decoded 3 is compared (at a comparator 4)
against the opcodes in the Opcode Compare Registers 1, and
appropriate operations are performed based on the values in the
Opcode Compare Control Registers 2.  Some of the actions to be
performed are:
1.   Disable overlap when the Opcodes match (i.e., wait for the
pipeline to empty before decoding the specified instruc tion).
2.   Disable overlap when the part of the Opcodes match (i.e., first
2 bits, first 4 bits, etc.).  This allows disable overlap on class of
instruction.
3.   Send the instruction to the Microcode controlled execution
element and map it to a predetermined Microcode start-up address
instead of sending it to a hard-wired execution element.

                            (Im...