Browse Prior Art Database

Means for Tracing Signal Flow in a Hardware Simulator

IP.com Disclosure Number: IPCOM000103199D
Original Publication Date: 1990-Aug-01
Included in the Prior Art Database: 2005-Mar-17
Document File: 1 page(s) / 61K

Publishing Venue

IBM

Related People

Hoffman, H: AUTHOR

Abstract

Disclosed is a method of efficiently tracing signal flow backward through a hardware simulator by using the model data contained in the simulator itself.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 59% of the total text.

Means for Tracing Signal Flow in a Hardware Simulator

      Disclosed is a method of efficiently tracing signal flow
backward through a hardware simulator by using the model data
contained in the simulator itself.

      After execution of a simulation cycle, a user may want to
interrogate the simulator to determine why certain gates (nets) are
set to certain values.

      The simulation model that is loaded into the hardware is a
series of gates, with the input to each gate being another gate or a
primary (undriven) net.  In order to determine why a certain gate has
a certain value, it is helpful to look at the input nets of this
gate, as well as the gate type ('and', 'xor', etc.), and other
information (inversions).  All of this information is contained in
the model loaded into the hardware.  The basic technique in this
disclosure is reading the hardware directly to determine not only
logic values, but to determine the exact logic itself (gates &
interconnections).

      The user specifies a net name or a hardware gate address, and
the software does the following:  1) reads the symbol table, if
necessary, to get the hardware gate address, 2) reads the hardware
gate description from the hardware to get the input addresses, the
gate type, and other information, 3) reads the hardware value table
from the hardware to get the values of the gate and inputs, 4)
resolves the gate addresses to symbol names using the symbol table,
and 5) formats and presents t...