Browse Prior Art Database

Discrete Layer 1 Ground Plane for Ceramic Substrates

IP.com Disclosure Number: IPCOM000103221D
Original Publication Date: 1990-Aug-01
Included in the Prior Art Database: 2005-Mar-17
Document File: 1 page(s) / 42K

Publishing Venue

IBM

Related People

Nolan, RG: AUTHOR

Abstract

Disclosed is a discrete ground plane that is pressed onto the layer 1 of ceramic substrate products. The ground plane is made of a thin sheet of metal (Cu or A1 alloy) that is permanently assembled against the ceramic by virtue of the "tinnerman spring clip" configuration in the discrete that locks onto all the ground I/O's (pins). Clearance holes are provided for all the signal I/O's. (See Figure.)

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Discrete Layer 1 Ground Plane for Ceramic Substrates

      Disclosed is a discrete ground plane that is pressed onto the
layer 1 of ceramic substrate products.  The ground plane is made of a
thin sheet of metal (Cu or A1 alloy) that is permanently assembled
against the ceramic by virtue of the "tinnerman spring clip"
configuration in the discrete that locks onto all the ground I/O's
(pins).  Clearance holes are provided for all the signal I/O's.  (See
Figure.)

      Fiber Optic module programs require extensive Electrical Noise
shielding due to analog high speed logic. The current design utilizes
sputtered metalization on layer 1 of the ceramic that must be
soldered to the A1 module housing.  This solution is expensive, low
yielding, and because of the CTE mismatch between the ceramic and the
A1, an epoxy reinforcement was added to maintain the reliability of
the solder joint.  This disclosure is a solution that is: low cost,
easy to assemble, and because of a matching CTE with A1, could
potentially eliminate the epoxy reinforcement.

      This disclosure has potential applications of: Electrical Noise
shielding for high speed logic, replacing Polyimide ground plane
shielding with a discrete ground plane, adding wireability, reducing
product size by moving wiring to layer 1, and improving silicon
performance by adding a heat dissipation path from the center of the
ceramic to the perimeter of the module.

      Disclosed anonymously.