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Subcollector Structure for Complementary Bipolar Transistors

IP.com Disclosure Number: IPCOM000103226D
Original Publication Date: 1990-Aug-01
Included in the Prior Art Database: 2005-Mar-17
Document File: 1 page(s) / 55K

Publishing Venue

IBM

Related People

Lechaton, JS: AUTHOR [+2]

Abstract

Future VLSI bipolar circuits will require both NPN and PNP transistors. Disclosed is a process and structure for forming Psubcollectors over blanket N+ subcollectors.

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Subcollector Structure for Complementary Bipolar Transistors

      Future VLSI bipolar circuits will require both NPN and PNP
transistors.  Disclosed is a process and structure for forming
Psubcollectors over blanket N+ subcollectors.

      Czochralski grown P type <100> silicon substrates 1 are
prepared with a thin screen oxide of 20 nm.  An ion implant of
arsenic is performed such that a uniform layer of dopant is available
to form the N+ region 2.  A sacrificial oxidation is used to drive in
the dopant and remove the surface damage caused by the implantation
process.

      A conventional N- epitaxial silicon layer 3 is grown over the
N+ layer to a thickness of approximately 0.7 microns.  A thin oxide 4
is formed over the epi surface to a thickness of 50-70 nm.  Using
conventional photoresist processes, a window is opened in the resist
in the areas where the P+ layer is desired.  The oxide 4 is removed
from the windows by HF wet etching, for example.  Following resist
removal, wafers are coated with a boron glass, such as BSG or boron
doped spin-on glass 5.  Alternately, the resist can be left in place
and a boron ion implant could be used to form the P+ regions 6 as
shown in Figure 1.

      After subsequent annealing, the boron dopant source is removed,
if necessary, by wet chemical etching (HF for example).  A second
silicon epitaxial layer 7 is grown such that the doping is matched to
the initial epi doping and the thickness is optimized for...