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Die Stacking Through Interposer

IP.com Disclosure Number: IPCOM000103394D
Publication Date: 2005-Mar-17
Document File: 2 page(s) / 291K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method that uses an interposer to improve electrical transmissions in multiple die stacked packaging. Benefits include a solution that uses less die area and eliminates the need for as many as 60 package pins.

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Die Stacking Through Interposer

Disclosed is a method that uses an interposer to improve electrical transmissions in multiple die stacked packaging. Benefits include a solution that uses less die area and eliminates the need for as many as 60 package pins.

Background

Within the cellular phone market, body sizes are constrained by available cell phone board space, which forces suppliers to deliver the smallest package form factor possible with the greatest feature set. This creates a need for high-density, low-cost, small form factors and stacked-die packaging.

Currently, wire bond die stacking techniques use both die-to-substrate bonding, along with die-to-die bonding for connecting logic to the memory die (see Figure 1). The bond pad order for all die being stacked must be closely aligned to ensure that the connection is made at the lowest possible cost via wire bonding techniques. Substrate densification can be used, but it can add costs due to new technology developments. In many cases, there are limited memory stacking combinations.

General Description

In the disclosed method, the interposer interconnections consist of through holes, bumping, and/or wire bonding through an RDL layer to redistribute the transmissions (see Figures 2
and 3). The through holes enable connections to be redistributed away from the edges, which is consistent with current methods. The RDL layer on the through interconnect redistributes from the edge of the package to other locations within the p...