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Browse Prior Art Database

Improved N-well Control for the PMOS Pull-up Device in Off-chip Driver

IP.com Disclosure Number: IPCOM000103578D
Original Publication Date: 1993-Jan-01
Included in the Prior Art Database: 2005-Mar-18
Document File: 2 page(s) / 62K

Publishing Venue

IBM

Related People

Dhong, SH: AUTHOR [+2]

Abstract

Disclosed is an improved control method for the n-well of the PMOS pull-up device in an output driver. With the new devices, the operating region where the n-well of the PMOS pull-up device is floating is substantially reduced, making the off-chip driver (OCD) more immune to a latch-up.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 64% of the total text.

Improved N-well Control for the PMOS Pull-up Device in Off-chip Driver

       Disclosed is an improved control method for the n-well of
the PMOS pull-up device in an output driver.  With the new devices,
the operating region where the n-well of the PMOS pull-up device is
floating is substantially reduced, making the off-chip driver (OCD)
more immune to a latch-up.

      As CMOS technology improves, needs for interfacing between 3
and 5 V systems increases.  The OCD which interfaces a 3 V chip to a
5 V bus is difficult to design because it should be able to remain
tri-stated even if it is driven by other 5 V chips.  One way of
achieving this objective is using floating n-well PMOS pull-up device
as shown in [*].  In [*], the n-well is charged to VDD only when the
output voltage is lower than VDD- Vtp.  Otherwise, the n-well floats.
Generally, it is desirable to make the well float  as little as
possible because it gives more latch-up immunity and more predictable
circuit performance.

      In the new method, additional well-control devices are added so
that the operating range where the well is floating is drastically
reduced.  Compared to the prior-art, the well is clamped to VDD if
the OCD is enabled.  (No floating during an active cycle).  The well
floats during the tri-state only if the output voltage is between
VDD-Vtp and VDD+ Vtp.  Because of these new devices, the possibility
of the well being floating is drastically reduced for OCD interfaci...