Browse Prior Art Database

Adaptable Initialization for Highly Configurable Personal Computer Systems

IP.com Disclosure Number: IPCOM000103632D
Original Publication Date: 1993-Jan-01
Included in the Prior Art Database: 2005-Mar-18
Document File: 2 page(s) / 96K

Publishing Venue

IBM

Related People

Eng, RC: AUTHOR [+4]

Abstract

Described is a hardware/software implementation that provides adaptable initialization for highly configurable personal computer (PC) systems. A method of paging is used to allow multiple configurations to be supported within a single address space.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Adaptable Initialization for Highly Configurable Personal Computer Systems

       Described is a hardware/software implementation that
provides adaptable initialization for highly configurable personal
computer (PC) systems.  A method of paging is used to allow multiple
configurations to be supported within a single address space.

      Typically, read-only memory (ROM), residing on a processor
card, provides initialization and operation for a PC system.  Due to
address limitations and the possibility of large system
configurations, the code within the ROM can easily overflow its
assigned address space, or exceed the capacity of the circuit chip.
When a system requires a high degree of configurability, it will have
various upgrade paths.  New cards, gate arrays and circuit chips must
be initialized and supported with ROM code.  The system code in the
PC ROM must recognize, initialize and support all types of
configurations.

      In prior art, in order to accommodate large configurations,
several techniques were implemented, such as reducing the code size
by optimizing code, removing function, moving code outside of the ROM
chip, or implementing a separate chip requiring more system address
space.  These techniques were not considered viable for highly
configurable systems that needed initialization code within the ROM,
since the code that was required was too large to fit in the existing
chip and no additional system address space was available.

      The concept described herein provides an adaptable
initialization program for highly configurable environments.  Through
the use of ROM paging, a large ROM chip can be used in place of
a smaller capacity chip that matches the size of the available
address space.  ROM paging is utilized that allows software to select
a portion of the ROM to reside in the memory address space.  The rest
of the ROM is de-gated from the system memory bus.  This larger ROM
chip con...