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MSIS Z-segment Sharing by Equalization

IP.com Disclosure Number: IPCOM000103643D
Original Publication Date: 1993-Jan-01
Included in the Prior Art Database: 2005-Mar-18
Document File: 2 page(s) / 96K

Publishing Venue

IBM

Related People

Ekanadham, K: AUTHOR [+4]

Abstract

MSIS (Multisequencing a Single Instruction Stream) is a uniprocessor organization in which a set of processing elements (PEs) working in concert execute Segments of the instruction stream. The Segments are either P-Segments, normal uniprocessor instruction stream portions, that are processed in the E-MODE of MSIS and produce Z-Segments, or the Z-Segments that are processed in Z-MODE by MSIS. The main difference between E-MODE and Z-MODE is that during E-MODE each PE sees all instructions in the Segment and executes the ones that are assigned to it, but during Z-MODE, a PE only sees the instructions assigned to it.

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This is the abbreviated version, containing approximately 52% of the total text.

MSIS Z-segment Sharing by Equalization

       MSIS (Multisequencing a Single Instruction Stream) is a
uniprocessor organization in which a set of processing elements (PEs)
working in concert execute Segments of the instruction stream.  The
Segments are either P-Segments, normal uniprocessor instruction
stream portions, that are processed in the E-MODE of MSIS and produce
Z-Segments, or the Z-Segments that are processed in Z-MODE by MSIS.
The main difference between E-MODE and Z-MODE is that during E-MODE
each PE sees all instructions in the Segment and executes the ones
that are assigned to it, but during Z-MODE, a PE only sees the
instructions assigned to it.

      As all PEs see all instructions in E-MODE, each PE can create
the Z-CODE it will require to re-execute the Segment as a Z-Segment,
the Z-CODE being stored in the Z-CACHE, and associated with in
structions in the Z-CODE are S-LISTS and D-LISTS as appropriate.  An
S-LIST instructs the PE, in the Z-MODE, that one or more of the
source registers in an instruction assigned to it is set by another
instruction that is executed on another PE, an S-LIST is a receiving
obligation.  The D-LIST instructs the PE in the Z-MODE as to the
names of PEs that require the values of the register(s) that are
being set by an instruction that is assigned to it.  A D-LIST entry
is a sending obligation.

      A new instruction is introduced in the Z-MODE operation of an
MSIS Processor which provides for both branching to another Z-CODE
location and equalizing the register usage.  The accessed code which
is formed with a pristine start can then be entered by any number of
Z-SEGMENTS, all of which branch to it with equalization of registers.

      Within MSIS no provision has been made for instructions that
operate within the Z-MODE that were not part of the original
execution sequence.  This oversight can be corrected if it can be
determined that the operations within the Z-MODE of the processor can
gain an advantage from such additional instructions.  One example of
such an instruction is a branch operation that can be placed on a
contour within the Z-CODE so that all processor elements will
encounter the branch...