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Time Multiplexed Pins for Monitoring the State of an Integrated Circuit

IP.com Disclosure Number: IPCOM000103648D
Original Publication Date: 1993-Jan-01
Included in the Prior Art Database: 2005-Mar-18
Document File: 2 page(s) / 70K

Publishing Venue

IBM

Related People

Bakoglu, HB: AUTHOR [+2]

Abstract

It is useful to monitor the state of a VLSI chip during run time for a number of reasons. For example, accurate performance data can be obtained by recording cache misses, TLB misses and execution frequency of various instructions. This information can be used to measure the performance of existing systems, to identify improvements for future systems and even to tune some application programs.

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This is the abbreviated version, containing approximately 56% of the total text.

Time Multiplexed Pins for Monitoring the State of an Integrated Circuit

       It is useful to monitor the state of a VLSI chip during
run time for a number of reasons.  For example, accurate performance
data can be obtained by recording cache misses, TLB misses and
execution frequency of various instructions.  This information can be
used to measure the performance of existing systems, to identify
improvements for future systems and even to tune some application
programs.

      Usually, the problem is to obtain the data in a reasonable
amount of time and without affecting the performance or the cost of
the system.  Most indirect methods are slow and take too much time
and, as a result, they cannot be used to extract data from very large
programs.  Direct methods are expensive because they require
additional pins from the chip packages.

      The method proposed in this article is to time multiplex some
of the chip pins to monitor a set of selected signals as shown in the
figure.  This provides the benefit of directly collecting the data
without increasing the pin count prohibitively.

      The scheme works as follows:
      1.  The system clock is slowed down to approximately half its
regular rate.
      2.  Either an external select signal or the actual system clock
is used as a selector for the output multiplexer.  During the first
half of the cycle, monitored data is selected and captured by a
signal analyzer or a custom-designed mo...