Browse Prior Art Database

MSIS Reducing the Branch Wrong Guess Penalty

IP.com Disclosure Number: IPCOM000103685D
Original Publication Date: 1993-Jan-01
Included in the Prior Art Database: 2005-Mar-18
Document File: 3 page(s) / 151K

Publishing Venue

IBM

Related People

Ekanadham, K: AUTHOR [+4]

Abstract

MSIS (Multisequencing a Single Instruction Stream) is a uniprocessor organization in which a set of processing elements (PEs) working in concert execute Segments of the instruction stream. The Segments are either P-Segments, normal uniprocessor instruction stream portions, that are processed in the E-MODE of MSIS and produce Z-Segments, or the Z-Segments that are processed in Z-MODE by MSIS. The main difference between E-MODE and Z-MODE is that during E-MODE each PE sees all instructions in the Segment and executes the ones that are assigned to it, but during Z-MODE, a PE only sees the instructions assigned to it.

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MSIS Reducing the Branch Wrong Guess Penalty

       MSIS (Multisequencing a Single Instruction Stream) is a
uniprocessor organization in which a set of processing elements (PEs)
working in concert execute Segments of the instruction stream.  The
Segments are either P-Segments, normal uniprocessor instruction
stream portions, that are processed in the E-MODE of MSIS and produce
Z-Segments, or the Z-Segments that are processed in Z-MODE by MSIS.
The main difference between E-MODE and Z-MODE is that during E-MODE
each PE sees all instructions in the Segment and executes the ones
that are assigned to it, but during Z-MODE, a PE only sees the
instructions assigned to it.

      As all PEs see all instructions in E-MODE, each PE can create
the Z-CODE it will require to re-execute the Segment as a Z-Segment,
the Z-CODE being stored in the Z-CACHE, and associated with
instructions in the Z-CODE are S-LISTS and D-LISTS as appropriate.
An S-LIST instructs the PE, in the Z-MODE, that one or more of the
source registers in an instruction assigned to it is set by another
instruction that is executed on another PE, an S-LIST is a receiving
obligation.  The D-LIST instructs the PE in the Z-MODE as to the
names of PEs that require the values of the register(s) that are
being set by an instruction that is assigned to it.  A D-LIST entry
is a sending obligation.

      Consider the paradigm of the IF (PREDICATE) THEN as it appears
in the Z-SEGMENT.  The insertion of a conditional BRANCH & EQUALIZE
allows the Z-SEGMENT to operate with  both paths if primed to
anticipate the PREDICATE.  The CB&E is a Conditional Branch &
Equalize instruction that is added to the Z-CODE that specifies for
each decoder the next Z-CODE instruction and distributes the register
values to all PEs so that the ensuing Z-CODE can execute correctly.
The action of the Branch & Equalize (B&E) is similar, but the action
is unconditional.  The priming of the predicate, the anticipation as
to whether a CB&E is to be taken or not, is based on the information
maintained by a DHT within each PE.  Ordinarily, the alternate paths
to a given point in a program necessitate alternate Z-SEGMENTS.  The
generic ability endowed by a B&E to enter any Z-SEGMENT which is
derived from a pristine start can be extended by creating a
conditional version of the B&E called the CB&E.  If both paths
EQUALIZE, a single  Z-SEGMENT can be formed to represent an IF (P)
THEN by inserting a CB&E and a B&E at the proper places in the
Z-CODE.  The resultant Z-SEGMENT must be PRIMED as to the action of
the CB&E in all PEs, prior to the dispatch of the Z-SEGMENT.

      The manner of implementation of the Conditional Branch &
Equalize (CB&E) within the Z-CODE of MSIS is to activate a
pre-defined field in every Z-Instruction rather than interpolate
instructions between Z- Instructions.  Such an approach allows for
greater flexibility of adding the CB&E function to existing Z-CODE
subsequent to Z-...