Browse Prior Art Database

Enhanced Arbitration Method for Personal Computers

IP.com Disclosure Number: IPCOM000103705D
Original Publication Date: 1993-Jan-01
Included in the Prior Art Database: 2005-Mar-18
Document File: 4 page(s) / 225K

Publishing Venue

IBM

Related People

Chisholm, DR: AUTHOR

Abstract

Described is an architectural implementation for personal computers (PCs) that are equipped with the MICRO CHANNEL* (MC). The design improves performance by reducing arbitration time through centralized arbitration.

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This is the abbreviated version, containing approximately 33% of the total text.

Enhanced Arbitration Method for Personal Computers

       Described is an architectural implementation for personal
computers (PCs) that are equipped with the MICRO CHANNEL* (MC).  The
design improves performance by reducing arbitration time through
centralized arbitration.

      In prior art, the MC architecture utilized a procedure for
resolving multiple requests for control of the channel which involved
three areas: local arbiters, arbitration bus for associated signals,
and a central arbitration control point (CACP).  A parallel
arbitration bus was used which consisted of four lines supporting up
to sixteen arbitration levels.  The CACP controlled the arbitration
cycles using three arbitration signals: -PREEMPT, ARB/-GNT and
-BURST.  Local arbiters drove -PREEMPT active to request use of the
channel.  When an end of transfer (EOT) condition was detected, the
CACP initialized an arbitration cycle by driving ARB/-GNT to the ARB
state.  An EOT was indicated by the trailing edge of -SO, -SI,
-BURST, or -CMD, whichever occurred last.

      The requesting local arbiters drove their 4-bit arbitration
level onto the ARB bus when ARB/-GNT went to the ARB state.  When a
local arbiter detected a more significant bit that was low on the ARB
bus, other than those driven low by itself, it stopped driving its
less significant bits onto the ARB bus.  The local arbiter, driving
the lowest arbitration level, won control of the channel when
ARB/-GNT went to the -GNT state.  The local arbiters consisted of
direct memory access (DMA) slave adapters and bus master adapters.
Often the system master was the default master in that it controlled
the MC when the channel was not controlled by any other master, or
the system master vied for control of the channel by driving -PREEMPT
and arbitrating with other local arbiters.  The system master also
performed data transfers and system logic performed refresh cycles
when ARB/-GNT was in the ARB state.

      Fig. 1 shows a block diagram of the prior-art MC arbitration
interaction and physical planar implementation between the CACP and
the local arbiters.  ARB/-GNT was driven by the CACP and received by
the local arbiters.  -PREEMPT, -BURST, and the ARB bus are defined as
open-collector drivers.  The DMA controller monitors the ARB bus to
detect its DMA slaves' arbitration level and to support data
transfers with DMA and memory slaves.  Local arbiters are DMA slave
and bus master adapters that drive -PREEMPT to signal a request for
channel ownership and are used for three functions: a) to drive and
receive the ARB bus with their arbitration level to arbitrate for
ownership of the channel when ARB/-GNT was in the ARB state, b) to
obtain channel ownership when the ARB bus matches their arbitration
level when ARB/-GNT went to the -GNT state, and c) to drive -BURST to
signal multiple bus cycles during ownership of the channel.  The
system master also was used as a local arbiter.

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