Browse Prior Art Database

MSIS Making Z to Z Transitions Asynchronous

IP.com Disclosure Number: IPCOM000103733D
Original Publication Date: 1993-Jan-01
Included in the Prior Art Database: 2005-Mar-18
Document File: 5 page(s) / 215K

Publishing Venue

IBM

Related People

Pomerene, J: AUTHOR [+3]

Abstract

MSIS (Multisequencing a Single Instruction Stream) is a uniprocessor organization in which a set of processing elements (PEs) working in concert execute Segments of the instruction stream. The Segments are either P-Segments, normal uniprocessor instruction stream portions, that are processed in the E-MODE of MSIS and produce Z-Segments, or the Z-Segments that are processed in Z-MODE by MSIS. The main difference between E-MODE and Z-MODE is that during E-MODE each PE sees all instructions in the Segment and executes the ones that are assigned to it, but during Z-MODE, a PE only sees the instructions assigned to it.

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MSIS Making Z to Z Transitions Asynchronous

       MSIS (Multisequencing a Single Instruction Stream) is a
uniprocessor organization in which a set of processing elements (PEs)
working in concert execute Segments of the instruction stream.  The
Segments are either P-Segments, normal uniprocessor instruction
stream portions, that are processed in the E-MODE of MSIS and produce
Z-Segments, or the Z-Segments that are processed in Z-MODE by MSIS.
The main difference between E-MODE and Z-MODE is that during E-MODE
each PE sees all instructions in the Segment and executes the ones
that are assigned to it, but during Z-MODE, a PE only sees the
instructions assigned to it.

      As all PEs see all instructions in E-MODE, each PE can create
the Z-CODE it will require to re-execute the Segment as a Z-Segment,
the Z-CODE being stored in the Z-CACHE, and associated with
instructions in the Z-CODE are S-LISTS and D-LISTS as appropriate.
An S-LIST instructs the PE, in the Z-MODE, that one or more of the
source registers in an instruction assigned to it is set by another
instruction that is executed on another PE, an S-LIST is a receiving
obligation.  The D-LIST instructs the PE in the Z-MODE as to the
names of PEs that require the values of the register(s) that are
being set by an instruction that is assigned to it.  A D-LIST entry
is a sending obligation.

      The set of instructions  assigned to a single PE can be further
delineated as THREADS.  A THREAD is a sequence of instructions in the
original conceptual order and a Thread is associated with a register
file which is either real or virtual.  There are no sending or
receiving obligations between instructions within a THREAD, and the
THREAD is the smallest unit of aggregation of instructions from a
SEGMENT.

      At the conclusion of a Z-SEGMENT or at the point of a Branch
Wrong Guess (BWG), the register state of the processor is distributed
among the register files that constitute the results of THREAD
processing. To determine the machine state a ZZT is employed.  The
ZZT is a two-dimensional structure which is accessed by both
architected register name and level of conditionality.  The level of
conditionality of an instruction is assigned to instructions during
the E-MODE and corresponds to the number of: branch instructions,
serializers, and entry points that are not targets of branches within
the Z-CODE, that precedes the instruction in the program segment.
Each position within the ZZT has within it an indicator as to whether
or not the said register value is changed by an instruction at this
level of conditionality.  The entry can be invalid if value has not
yet been set by the processor and the register named may be invalid
until its value has been set by that self-same processor.  The entry
may be null to indicate that no instruction at that level of
conditionality sets the value of the register and this refers all
accesses to the prior level of conditionality. ...