Browse Prior Art Database

VLSI Pad Layout Having Power Isolation

IP.com Disclosure Number: IPCOM000103744D
Original Publication Date: 1993-Jan-01
Included in the Prior Art Database: 2005-Mar-18
Document File: 1 page(s) / 94K

Publishing Venue

IBM

Related People

Masleid, RP: AUTHOR

Abstract

Increasingly larger integrated circuits and joint failure rates have combined to force integrated circuit I/O pads into an array at the chip center in modern integrated circuits. A conventional approach to integrated circuit construction utilizes the third layer of metal for power distribution and to connect the chip pads at their new positions to I/O circuits which remain at the chip periphery.

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VLSI Pad Layout Having Power Isolation

      Increasingly larger integrated circuits and joint failure rates
have combined to force integrated circuit I/O pads into an array at
the chip center in modern integrated circuits.  A conventional
approach to integrated circuit construction utilizes the third layer
of metal for power distribution and to connect the chip pads at their
new positions to I/O circuits which remain at the chip periphery.

      In the present disclosure the pitch of the pad layout is
synchronized with the second layer of metal power buses which supply
circuit power.  This regularity permits the third layer of metal
power buses to be arranged as islands.  The bays provided between
these islands permit flexibility in selection of I/O pads, location
of interior I/O circuits and pad to circuit wiring.

      The new third layer of metal and pad layout is illustrated
here.  The regular vertical lines shown therein are second layer of
metal power buses which distribute power to local power buses.  Third
layer of metal power buses (irregular polygons) cover nearly the
entire chip.  These power buses connect the circuit power pads to the
second layer of metal power buses.  Isolated Off Chip Driver power is
available by a similar arrangement in three horizontal bands in which
Off Chip Drivers may be placed.  Internal circuits may encroach on or
entirely fill these areas by extension of their second layer of metal
power buses.  The third layer...