Browse Prior Art Database

Method for Ensuring Keyboard Mouse Clock Validity

IP.com Disclosure Number: IPCOM000103751D
Original Publication Date: 1993-Jan-01
Included in the Prior Art Database: 2005-Mar-18
Document File: 1 page(s) / 67K

Publishing Venue

IBM

Related People

Klim, P: AUTHOR [+3]

Abstract

Disclosed is sampling the keyboard clock signal to a keyboard mouse controller circuit using a sampling period having sufficient duration to prevent misinterpretation of a short pulse generated on the keyboard clock output of an I/O controller chip, when this short pulse is distorted and widened by an open-collector interface.

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This is the abbreviated version, containing approximately 66% of the total text.

Method for Ensuring Keyboard Mouse Clock Validity

      Disclosed is sampling the keyboard clock signal to a keyboard
mouse controller circuit using a sampling period having sufficient
duration to prevent misinterpretation of a short pulse generated on
the keyboard clock output of an I/O controller chip, when this short
pulse is distorted and widened by an open-collector interface.

      A keyboard and system communicate over clock and data lines,
which are sourced by an open-collector device on the keyboard to
allow either the keyboard or the system to force a line to an
inactive (low) level.  When no communication is occurring, these
lines are held at a active (high) level.

      In a receive mode with security enabled, the keyboard mouse
controller attempts to match each data byte transmitted from the
keyboard with the stored keyboard password of the system.  When the
last data byte is received, the clock line is disabled for one clock
time (i.e., 50 nanoseconds) and then returned to a high state by the
system.  Once the last byte is compared and the attempted password is
determined to be valid, the system returns the clock line to an
active state so that future transmissions are not delayed.

      However, the 50-nanosecond disable pulse can be distorted and
widened to more than three times the original pulse width, for
example, to about 180 nanoseconds, through the open-collector
interface, and this widened clock pulse can be interpreted as a vali...