Browse Prior Art Database

Padding Data for Triggering and Tracing with an Internal Logic Analyzer

IP.com Disclosure Number: IPCOM000103878D
Original Publication Date: 1993-Feb-01
Included in the Prior Art Database: 2005-Mar-18
Document File: 4 page(s) / 70K

Publishing Venue

IBM

Related People

Stasiak, DL: AUTHOR [+2]

Abstract

Padding Latches can be added to the data path feeding an internal Trace Array (Logic Analyzer). Adding the Padding latches can selectively delay the input value of a signal to the trigger logic and/or trace logic. The selective delay can be used to create sequential triggering and to align data in the trace array.

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Padding Data for Triggering and Tracing with an Internal Logic Analyzer

      Padding Latches can be added to the data path feeding an
internal Trace Array (Logic Analyzer).  Adding the Padding latches
can selectively delay the input value of a signal to the trigger
logic and/or trace logic.  The selective delay can be used to create
sequential triggering and to align data in the trace array.

      Aligning the data is important to complete triggering and to
make the data in the analyzer more readable for the user.  The
problem with aligning this data is the required design time and the
ever present possibility that the final hard wired aligning is still
incorrect for some applications.

      An easy solution is to allow for one or more of these Pad
Registers.  A method for using one Pad Register for simplicity
follows, but the idea can easily be expanded to include multiple Pad
Registers in a stack form.

      The Pad logic in Fig. 1 is located after the selecting logic
for the Trace Data and Trigger Data and before the Trace and Trigger
Input Registers.  The Pad logic allows bit control padding for the
selected groups of signals so each bit can be delayed individually.
The selecting is done by microcode.  When the user is setting up the
Trace Array, the alignment of the signals can also be adjusted.

      The pad logic consists of the following.

      o  Pad Register-1

      o  Select Pad Register-2

      o  Selecting Logic-...