Browse Prior Art Database

Microprocessor to Peripheral Interface Isolation

IP.com Disclosure Number: IPCOM000103972D
Original Publication Date: 1993-Feb-01
Included in the Prior Art Database: 2005-Mar-18
Document File: 2 page(s) / 51K

Publishing Venue

IBM

Related People

Cleveland, LD: AUTHOR [+4]

Abstract

The microprocessor to peripheral interface is susceptible to many types of errors. Common errors include microcode errors, opens, shorts, and noise. Isolation of the error is important to characterize and properly report the problem. A mechanism to isolate errors on address lines during MMIO (memory-mapped input/output) operations is disclosed.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 64% of the total text.

Microprocessor to Peripheral Interface Isolation

      The microprocessor to peripheral interface is susceptible to
many types of errors.  Common errors include microcode errors, opens,
shorts, and noise.  Isolation of the error is important to
characterize and properly report the problem.  A mechanism to isolate
errors on address lines during MMIO (memory-mapped input/output)
operations is disclosed.

      A typical microprocessor based design is outlined in the
figure.  The microprocessor to peripheral interface usually consists
of control, address, and data signals.  Each peripheral has a unique
address map on the microprocessor bus.  The peripheral responds to a
memory-mapped input/output (MMIO) on this interface.

      Errors on the interface are easily detected via parity
checking.  For isolation capability a memory-mapped register is added
to each peripheral.  This register has the following characteristics:

o   Saves all address and parity bits.

o   Updated on all MMIO writes.

o   Locked on any interface error.

    Address parity error.
    Invalid Address in peripheral address range.
    Internal MMIO processing error.
    Data parity error on writes.

o   Unlocked when corresponding error is clear.

The additional interface register enables code to perform many
isolation procedures.  For instance, a simple basic assurance test to
verify all address lines can be outlined using above definition.
Assume eight address and one p...