Browse Prior Art Database

Two Execution Unit String Ops

IP.com Disclosure Number: IPCOM000103983D
Original Publication Date: 1993-Feb-01
Included in the Prior Art Database: 2005-Mar-18
Document File: 1 page(s) / 38K

Publishing Venue

IBM

Related People

Ray, DS: AUTHOR

Abstract

In a multiple execution unit design, it is desirable to execute string load and store operations as fast as possible. String operations can take multiple cycles and during their execution, they can interrupt due to a page fault or other problem. In double execution designs, either execution unit is capable of executing a string op by itself. However, to preserve precise interrupts, it is not easy to execute a string op in one unit and some other op in the other unit because due to interrupts it would be necessary to "undo" the op in the second unit. If the choice was to execute the string op only in one unit and nothing in the other unit, then half of the resources would be wasted. The solution was to execute string ops in both units. This allows maximum usage of the resources available.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 80% of the total text.

Two Execution Unit String Ops

      In a multiple execution unit design, it is desirable to execute
string load and store operations as fast as possible.  String
operations can take multiple cycles and during their execution, they
can interrupt due to a page fault or other problem.  In double
execution designs,  either execution unit is capable of executing a
string op by itself.  However, to preserve precise interrupts, it is
not easy to execute a string op in one unit and some other op in the
other unit because due to interrupts it would be necessary to "undo"
the op in the second unit.  If the choice was to execute the string
op only in one unit and nothing in the other unit, then half of the
resources would be wasted.
     The solution was to execute string ops in both units.  This
allows maximum usage of the resources available.  And since both
units are executing the same string op, it is not necessary to "undo"
any operations.  This solution allows 2 words of loads or stores to
be completed every cycle as opposed to one word every cycle.
     This was accomplished by dispatching the opcode to both units.
Since both units are capable of generating independent byte effective
addresses, and it was desired to have the first unit address the
first four bytes in memory and the second unit address the second
four bytes in memory, four was added to the effective address in the
second execution unit.  On subsequent cycles, eight is added to each
effective...