Browse Prior Art Database

New Heat Sink Technique for Semiconductors

IP.com Disclosure Number: IPCOM000104052D
Original Publication Date: 1993-Mar-01
Included in the Prior Art Database: 2005-Mar-18
Document File: 2 page(s) / 95K

Publishing Venue

IBM

Related People

Forster, T: AUTHOR [+5]

Abstract

The limited efficiency of electronic devices leads to the generation of waste heat. This heat affects, in general, the device performance and therefore it must be extracted from the active device area. This requires low thermal impedance and highly effective heat transfer. For global chip, cooling proposals have been made which allow high-performance heat exchange through microchanneled heat sinks. For single devices, effective cooling can be obtained through active-area-down mounting. However, connectivity of the individual devices requires a complicated and expensive structured-substrate technology. The commonly used C4 solder-bump technology allows full connectivity, but does not offer high-performance cooling capabilities.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 60% of the total text.

New Heat Sink Technique for Semiconductors

      The limited efficiency of electronic devices leads to the
generation of waste heat.  This heat affects, in general, the device
performance and therefore it must be extracted from the active device
area.  This requires low thermal impedance and highly effective heat
transfer.  For global chip, cooling proposals have been made which
allow high-performance heat exchange through microchanneled heat
sinks.  For single devices, effective cooling can be obtained through
active-area-down mounting.  However, connectivity of the individual
devices requires a complicated and expensive structured-substrate
technology.  The commonly used C4 solder-bump technology allows full
connectivity, but does not offer high-performance cooling
capabilities.

      Highly effective one-dimensional heat extraction, perpendicular
to the active plane, can be obtained through local, individual heat
sinks.  Such a configuration allows active-area-up mounting and
connectivity to the (patterned) top side of the device.  In addition,
thermal decoupling of the devices is obtained, reducing
thermally-induced crosstalk.  This technique can be applied to any
semiconductor device or circuit; the figure shows application to an
AlGaAs semiconductor laser.

      After standard laser fabrication (top side of the wafer), a
photolithographic mask is formed on the wafer backside aligned to the
front side.  This mask leaves openings underneath the a...