Browse Prior Art Database

Macro Aspects of Structures Suited to Micro Capabilities

IP.com Disclosure Number: IPCOM000104070D
Original Publication Date: 1993-Mar-01
Included in the Prior Art Database: 2005-Mar-18
Document File: 2 page(s) / 104K

Publishing Venue

IBM

Related People

Pomerene, J: AUTHOR [+2]

Abstract

There are specific structures within a processor design that fulfill micro requests but are not suited to performing macro requests. A different structure is needed to service these macro requests.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 51% of the total text.

Macro Aspects of Structures Suited to Micro Capabilities

      There are specific structures within a processor design that
fulfill micro requests but are not suited to performing macro
requests.  A different structure is needed to service these macro
requests.

There are two levels at which the information that might help a
processor design could be held.

1.  The micro-level which derives:

    o   the answer to what action/target is anticipated for a branch
        instruction from a Branch History Table, or
    o   the residence of a DW within an L1 cache based on the
        directory of that cache.

2.  The macro-level which derives:

    o   the next I-LINE to be accessed based on all the branch
        actions within the line, or
    o   the next line that will be accessed by the processor.

A relationship exists between the micro-level and the macro-level, as
the basis for the answers to questions at the macro level are found
by combining the answers to questions at the micro-level.  This is
not to say that a common structure can or should be required to
perform both operations.  This disclosure investigates this question
in detail.

      MACRO ANSWERS DO NOT CHANGE WITHOUT CHANGES AT THE MICRO LEVEL
- Let us consider the example of a PAGEABLE BHT wherein only the
portion of a BRANCH HISTORY TABLE thought to be relevant was
available in the active area.  The basis for prefetching additional
portions of the BHT was based on an analysis of EXITS from the
portions already brought into the active area with the realization
that such an analysis of line EXITS remains valid as long as the
branch actions have not changed and the only branch actions that can
change are those branches within the active area.  This is not to say
that a table of line EXITS can be easily updated and could in itself
establish the instruction fetching for the interior of a line, a
function performed on a micro level by a BHT.

      The lesson of the observation that the macro-level can not be
altered, if the micro-level is not changed, identifies the need to
trigger macro-level changes only at the points of micro-level changes
and possibly in a different structure.

      DECIPHERING ACCESSES TO DETERMINE FUTURE REQUIREMENTS -
Consider the problem of using prior accesses as a means of
determining future accesses on an abstract basis.  The accesses made
by a program are the means that it employs to instantiate values in
general purpose registers.  These values in conjunction with other
instructions are the basis for future accesses and if it is assumed
that the instructions do not change then a means of anticipating
future access targets can be based on a mechanism that uses both the
instruction locality and the prior data locality to establish the
future locality of the data.   This method of anticipating future
requirements for data is called the I x D -> D prefetching mechanism.

      FAILURE O...