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Maintaining Sequences within the L2 Directory

IP.com Disclosure Number: IPCOM000104123D
Original Publication Date: 1993-Mar-01
Included in the Prior Art Database: 2005-Mar-18
Document File: 2 page(s) / 66K

Publishing Venue

IBM

Related People

Pomerene, J: AUTHOR [+2]

Abstract

The single logical L2 cache directory affords a means of control of the entire memory hierarchy associated with all the processors attached to it and their L1-cache structure. The management is done in terms of recording and using repetitive sequences in conjunction with a Memory Management Processor (MMP) that is associated with the L2 Directory. The purpose of the MMP is to perform the necessary logic associated with recording the sequences, determining which level within the L2 is to be used, determining if the address found at the proper level needs a prefetch, and utilize whatever pacing information is present to time the prefetch. The recording of these sequences in best done within the structure of the L2 directory and this approach is detailed.

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Maintaining Sequences within the L2 Directory

      The  single  logical  L2  cache directory affords a means of
control of the entire memory hierarchy associated  with  all the
processors attached to it and their L1-cache structure.  The
management is done  in  terms  of  recording  and  using repetitive
sequences in conjunction with a Memory Management Processor  (MMP)
that  is associated with the L2 Directory.  The purpose of the MMP is
to  perform  the  necessary  logic associated  with  recording the
sequences, determining which level within the L2  is  to  be  used,
determining  if  the address  found  at  the  proper  level needs a
prefetch, and utilize whatever pacing information is present to  time
the prefetch.    The  recording  of these sequences in best done
within the structure of the L2 directory and  this  approach is
detailed.

      When considering the approach of using the L2 cache directory
to monitor the repetitive nature of certain L1-miss  sequences, to
validate these sequences as useful in prefetching or other cache line
control operations, one must consider the best structure to recording
these sequences.  The sequences can be recorded as an extension of
the L2 Cache directory on a L1-cache line basis.  Each  L1-cache
line has reserved positions, levels, within the L2-directory that
allow for the recording of  the addresses  of  successor  misses
that follow the cache line (predecessor) miss in some recorded
sequence.   To record  a sequence  of L1-cache misses, typically
following a L1-cache purge, the entry for the successor miss is
recorded in one of the levels associated with the directory entry for
the predecessor in the L2 cache.  If the line address already appears
in any level, the recording is terminated as the L1-miss sequence has
joined a pre-existing  sequence.  If a different  successor  entry
already  appear...