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Resolving BWG Impact on Prefetching using an L2 Directory

IP.com Disclosure Number: IPCOM000104187D
Original Publication Date: 1993-Mar-01
Included in the Prior Art Database: 2005-Mar-18
Document File: 2 page(s) / 62K

Publishing Venue

IBM

Related People

Pomerene, J: AUTHOR [+2]

Abstract

In a multiprocessing system, the impact of branch wrong guess on prefetching can be assimilated as a function associated with an L2 directory. The manner of integration of BWG within a prefetching strategy is defined. In contrast with ordinary I-CACHE prefetching approaches, the existence of a branch with variable action distorts the entire sequence of misses and makes much of the last used information concerning the access sequence genuinely worthless. In contrast to this low level approach, a higher level approach which incorporates aspects of: BHT action, BWG information, and the use of the directory of the L2 cache to determine prefetching alternatives, can manage the impact of a BWG on prefetching.

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Resolving BWG Impact on Prefetching using an L2 Directory

      In a multiprocessing system, the impact of branch wrong guess
on  prefetching  can be assimilated as a function associated with an
L2 directory.  The  manner  of  integration  of  BWG within  a
prefetching strategy is defined.  In contrast with ordinary I-CACHE
prefetching approaches, the existence of  a branch  with variable
action distorts the entire sequence of misses  and  makes  much  of
the  last   used   information concerning  the  access  sequence
genuinely worthless.   In contrast to this low level approach, a
higher level approach which incorporates aspects of:  BHT action, BWG
information, and the use of the directory of the L2  cache  to
determine prefetching  alternatives, can manage the impact of a BWG
on prefetching.

      Given a sequence of I-CACHE misses that are generated  by  a
program  the  two  factors that impact the repetition of the sequence
are:  lines already in the cache, and  BWG  (Branch Wrong  Guesses).
The  redirection at a branch selects a new path and that path affects
the sequence of I-FETCHES.  In  a machine  with  a conventional
Branch History Table (BHT), it is the multiple action/target
branches, the TYPE B  branches that  generate  this  alteration in
accesses.  If a means is provided  for  the  anticipation  of   the
potential   for bifurcation  induced  by  the  such  TYPE  B
branches,  the prefetching can continue to be productive.  The
existence of a TYPE B branch is signaled by a BWG  within  the
processor and  that  information  needs to be incorporated in the
miss sequence information if it affects the sequences of  misses.
The   bifurcation  in  miss  sequences  can  manifest  CACHE DYNAMICS
and it is assumed that  stand...