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Multisequencing a Single Instruction Stream Meta High-End Machine Instruction Processing Unit Reducing Operand Wrap Controls Complexity

IP.com Disclosure Number: IPCOM000104296D
Original Publication Date: 1993-Apr-01
Included in the Prior Art Database: 2005-Mar-19
Document File: 4 page(s) / 134K

Publishing Venue

IBM

Related People

Ekanadham, K: AUTHOR [+3]

Abstract

Multisequencing a Single Instruction Stream (MSIS_ is a uniprocessor organization in which a set of processing elements (PE) working in concert execute Segments of the instruction stream. The Segments are either P-Segments, normal uniprocessor instruction stream portions, that are processed in the E-MODE of MSIS and produce Z-Segments, or the Z-Segments that are processed in Z-MODE by MSIS. The main difference between E-MODE and Z-MODE is that during E-MODE each PE sees all instructions in the Segment and executes the ones that are assigned to it, but during Z-MODE, a PE only sees the instructions assigned to it.

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Multisequencing a Single Instruction Stream Meta High-End Machine Instruction Processing Unit Reducing Operand Wrap Controls Complexity

      Multisequencing a Single Instruction Stream (MSIS_ is a
uniprocessor organization in which a set of processing elements (PE)
working in concert execute Segments of the instruction stream.  The
Segments are either P-Segments, normal uniprocessor instruction
stream portions, that are processed in the E-MODE of MSIS and produce
Z-Segments, or the Z-Segments that are processed in Z-MODE by MSIS.
The main difference between E-MODE and Z-MODE is that during E-MODE
each PE sees all instructions in the Segment and executes the ones
that are assigned to it, but during Z-MODE, a PE only sees the
instructions assigned to it.

      As a PE sees all instructions in E-MODE, each PE can create the
Z-CODE it will require to re-execute the Segment as a Z-Segment, the
Z-CODE being stored in the Z-CACHE, and associated with instructions
in the Z-CODE are S-LISTS and D-LISTS as appropriate.  An S-LIST
instructs the PE, in the Z-MODE, that one or more of the source
registers in an instruction assigned to it is set by another
instruction that is executed on another PE, an S-LIST is a receiving
obligation.  The D-LIST instructs the PE in the Z-MODE as to the
names of PEs that require the values of the register(s) that are
being set by an instruction that is assigned to it.  A D-LIST entry
is a sending obligation.

      The set of instructions assigned to a single PE can be further
delineated as THREADS.  A THREAD is a sequence of instructions in the
original conceptual order and a Thread is associated with a register
file which is either real or virtual.  There are no sending or
receiving obligations between instructions within a THREAD and the
THREAD is the smallest unit of aggregation of instructions from a
SEGMENT.

      MSIS HEM is a High-End Machine design that uses multiple
decoders within a single processor in the place of separate processor
elements (PEs).  A single Instruction Processing Unit, IPU, executes
all instructions in MSIS HEM albeit through a multiplicity of
register files that are associated with the THREADS.  MSIS META HEM
is a Multiple Execution Thread Architecture that separates the
THREADS from the next higher aggregate of instructions the DECODER.
Thus the action of S-LIST and/or D-LIST entries  within  the

      Z-CODE  activates  and deactivates the THREADS and alternate
THREADS are decoded.

      One of the complex areas of the IPU design is the routing of
data  between  EXECUTION  UNITS.  This is handled by the OWC (Operand
Wrap Controls).  The potential for  the  E-MODE  to micromanage  the
transfer  of  WRAPPED  OPERAND  creates  a simplification of the
overall  OWC  busing  requirements  by using  a subfield within the
DLIST that specify busses to be used if the schedule is appropriate.
In  the  presence  of state induced delays, a...