Browse Prior Art Database

Multisequencing a Single Instruction Stream using a Compiler to Generate Threads

IP.com Disclosure Number: IPCOM000104318D
Original Publication Date: 1993-Apr-01
Included in the Prior Art Database: 2005-Mar-19
Document File: 4 page(s) / 189K

Publishing Venue

IBM

Related People

Ekanadham, K: AUTHOR [+3]

Abstract

The ability of a compiler to generate as efficient a sequence of instructions for each of a multiplicity of DECODERS is pursued. The potential for a 1-pass version of MSIS becomes practical thereby without deadlock. A simple language, ODUK, is defined which allows the COMPILER to create a DAG for each variable used in a PROGRAM. This DAG can be transformed into an DECODER and THREAD assignment for processing in MSIS Z-MODE.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 32% of the total text.

Multisequencing a Single Instruction Stream using a Compiler to Generate Threads

      The ability of a compiler to generate as efficient a sequence
of instructions for each of a multiplicity of DECODERS is pursued.
The potential for a 1-pass version of MSIS becomes practical thereby
without deadlock.  A simple language, ODUK, is defined which allows
the COMPILER to create a DAG for each variable used in a PROGRAM.
This DAG can be transformed into an DECODER and THREAD assignment for
processing in MSIS Z-MODE.

      MSIS is a uniprocessor organization in which a set of
processing elements (PE) working in concert execute Segments of the
instruction stream.  The Segments are either P-Segments, normal
uniprocessor instruction stream portions, that are processed in the
E-MODE of MSIS and produce Z-Segments, or the Z-Segments that are
processed in Z-MODE by MSIS.  The main difference between E-MODE and
Z-MODE is that during E-MODE each PE sees all instructions in the
Segment and executes the ones that are assigned to it, but during
Z-MODE, a PE only sees the instructions assigned to it.

      As all PEs see all instructions in E-MODE, each PE can create
the Z-CODE it will require to re-execute the Segment as a Z-Segment,
the Z-CODE being stored in the Z-CACHE, and associated with
instructions in the Z-CODE are S-LISTS and D-LISTS as appropriate.
An S-LIST instructs the PE, in the Z-MODE, that one or more of the
source registers in an instruction assigned to it is set by another
instruction that is executed on another PE, an S-LIST is a receiving
obligation.  The D-LIST instructs the PE in the Z-MODE as to the
names of PE's that require the values of the register(s) that are
being set by an instruction that is assigned to it.  A D-LIST entry
is a sending obligation.

      The set of instructions assigned to a single PE, can be further
delineated as THREADS.  A THREAD is a sequence of instructions in the
original conceptual order and a Thread is associated with a register
file which is either real or virtual.  There are no sending or
receiving obligations between instructions within a THREAD and the
THREAD is the smallest unit of aggregation of instructions from a
SEGMENT.

      Individual instructions, while executing, carry an indication
as to which SEGMENT, DECODER, and THREAD to which they belong.  The
information concerning the DECODER and THREAD is derived from the
Z-CODE itself.  The SEGMENT index is assigned sequentially at each
SEGMENT SWITCH.  Segment switches occur at points in the code where
the Z-SEGMENT terminates or where a Branch Wrong Guess has been
detected.

      MSIS HEM is a High-End Machine design that uses multiple
decoders within a single processor in the place of separate processor
elements (PEs).  A single Instruction Processing Unit (IPU) executes
all instructions in MSIS HEM albeit through a multiplicity of
registers files that are associated with the THREADS.  MSIS META HEM
is a...