Dismiss
InnovationQ will be updated on Sunday, Oct. 22, from 10am ET - noon. You may experience brief service interruptions during that time.
Browse Prior Art Database

RAMDAC Enhancement for Double Buffered Graphics Systems

IP.com Disclosure Number: IPCOM000104354D
Original Publication Date: 1993-Apr-01
Included in the Prior Art Database: 2005-Mar-19
Document File: 4 page(s) / 101K

Publishing Venue

IBM

Related People

Henderson, RL: AUTHOR [+3]

Abstract

A RAMDAC is a device which processes digital data from frame buffer memory and then converts it into analog signals which generate a picture on the Cathode Ray Tube (CRT) display. The processing typically includes using the pixel's value from the color planes of the frame buffer as an index into a color look-up table. Some more advanced RAMDACs incorporate a window table which specifies the attributes to be used when processing pixels belonging to a certain window on the display. Each pixel has window planes associated with it which the RAMDAC accepts as input from the frame buffer. Overlay planes may also be accepted by the RAMDAC. Images in overlay planes supersede those in the color planes.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

RAMDAC Enhancement for Double Buffered Graphics Systems

      A RAMDAC is a device which processes digital data from frame
buffer memory and then converts it into analog signals which generate
a picture on the Cathode Ray Tube (CRT) display.  The processing
typically includes using the pixel's value from the color planes of
the frame buffer as an index into a color look-up table.  Some more
advanced RAMDACs incorporate a window table which specifies the
attributes to be used when processing pixels belonging to a certain
window on the display.  Each pixel has window planes associated with
it which the RAMDAC accepts as input from the frame buffer.  Overlay
planes may also be accepted by the RAMDAC.  Images in overlay planes
supersede those in the color planes.

      High performance computer graphics systems require two banks of
memory for color and overlay planes.  "Frame Buffer A" is displayed
on the CRT while "Frame Buffer B" is being updated, and vice versa.
The color and overlay frame buffers being displayed are independent
and may differ from one window to another.  Data from the appropriate
frame buffers must be selected for each pixel before processing in
the RAMDAC can begin.

      One approach to this problem is to read data into the RAMDAC
from both frame buffers simultaneously and select the valid data
inside the RAMDAC.  This doubles the number of color and overlay
input pins per pixel.  Since it is common to have 24 color planes and
4 overlay planes, this would be 28 additional pins per pixel.  To
achieve the data rates required for high resolution displays, data
for multiple pixels (typically 4 or 5) is often loaded into the
RAMDAC in parallel.  Thus the number of additional pins grows
quickly.  This leads to expensive chip packaging and larger board
area.

      Another option is to select the valid data in a module external
to the RAMDAC and only input the correct frame buffer data to the
RAMDAC.  This reduces the number of pins required on the RAMDAC chip,
but it adds the additional cost of the external parts and there is a
much greater penalty in board area.

      A new function has been incorporated in a RAMDAC chip which
allows pre-sele...