Browse Prior Art Database

Quasi Net Typing: Automatic Support for Illegal Nets

IP.com Disclosure Number: IPCOM000104419D
Original Publication Date: 1993-Apr-01
Included in the Prior Art Database: 2005-Mar-19
Document File: 6 page(s) / 196K

Publishing Venue

IBM

Related People

Beyzavi, K: AUTHOR [+5]

Abstract

Previous tools attempted to optimize all physically and electrically legal nets. No automatic support was available for nets that failed to meet any aspect of the very complex electrical and physical checking requirements. Designers needed to manually review the many wiring rules to determine which rule is the "least bad", and then manually type and order the illeal net to that rule. This was a very time consuming process and error prone process.

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This is the abbreviated version, containing approximately 31% of the total text.

Quasi Net Typing: Automatic Support for Illegal Nets

      Previous tools attempted to optimize all physically and
electrically legal nets.  No automatic support was available for nets
that failed to meet any aspect of the very complex electrical and
physical checking requirements.  Designers needed to manually review
the many wiring rules to determine which rule is the "least bad", and
then manually type and order the illeal net to that rule.  This was a
very time consuming process and error prone process.

      During early stages of machine design, many nets are illegal
for any number of electrical reasons.  Perhaps early rules or
physical design estimates are overly pessimistic, or perhaps the
early high level design assertions were not correct.  Regardless of
the reasoning, when legal net solutions for nets do not exist, the
nets can not be typed and ordered automatically.

      In current and previous machines, this has had a notable
impact.  In order to perform timing analysis, or early pre-build
hardware analysis, net typing and ordering is required.  These
actions were performed by hand, while reading through extensive rules
listings.  See Fig. 1 for the original process flow.  The hardware
designers should not be saddled with the requirements to read and
understand rules that the tools require as input.  These processes
should be automated.

      This methodology automatically types and orders illegal nets
that do not completely meet all constraints of the electrical rules.
The end result is a package whose nets are all typed and ordered to
solutions, legal or illegal.  This allows the package to be timed,
and built without manual intervention.

      Once the "least illegal" solution(s) are found, steps can be
taken to properly optimize the net as much as possible.  These nets
are generally signed off by the engineering designer(s), fixed by
correcting the "least illegal" characteristic, or will become legal
when technology rules constraints are relaxed.

      The concept of automating the typing and ordering of illegal
nets to the least illegal rule is a new and unique one.  The new
streamlined process flow is described in Fig. 2.

      The following functions are provided by this method:

o   Determine the optimal illegal solution based on timing, length,
    or capacitance optimization and provide a selection list of
    illegal solutions, sorted by "illegality" from least illegal to
    most illegal.  This option provides interactive list selection.
o   Provide an algorithm and process to automatically type and order
    illegal sets of pins to the "least illegal" or best solution
    based on timing, length, or capacitance optimization targets.
    This option automatically chooses the best solution without
    interactive user selection.
o   Provide the ability to time and manufacture a package, regardless
    of illegal net(s).

      In the pas...