Browse Prior Art Database

Terminating Circuit with Driving Capability

IP.com Disclosure Number: IPCOM000104444D
Original Publication Date: 1993-Apr-01
Included in the Prior Art Database: 2005-Mar-19
Document File: 2 page(s) / 88K

Publishing Venue

IBM

Related People

Igarashi, R: AUTHOR

Abstract

Disclosed is a terminating circuit which terminates the far-end of a transmission line and drives another transmission line in order to transmit a voltage signal with less waveform distortion, reducing power dissipation for transmission. A long transmission line is divided into several short transmission lines, each of which is connected to this terminating circuit.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Terminating Circuit with Driving Capability

      Disclosed is a terminating circuit which terminates the far-end
of a transmission line and drives another transmission line in order
to transmit a voltage signal with less waveform distortion, reducing
power dissipation for transmission.  A long transmission line is
divided into several short transmission lines, each of which is
connected to this terminating circuit.

      The figure shows the example of this terminating circuit
connected to transmission lines 3A and 3B which are short
transmission lines divided by a long transmission line.  The
transmission line is driven by a voltage signal source 4 through
resistance 5.  The sum of the impedance of the voltage signal source
4 and the resistance 5 is selected to be equal to the characteristic
impedance (Zo) of the transmission line 3A.  To make description
easy, it is assumed that the impedance of the source 4 is very low,
so that resistance 5 is equal to Zo.

      In termination circuit 20, inverter 1 consists of P-channel MOS
transistor 6 and N-channel MOS transistor 7, and inverter 2 consists
of P-channel MOS transistor 8 and N-channel MOS transistor 9.  The
outputs of inverter 1 and 2 drive P-channel MOS transistor 10 and
N-channel MOS transistor 11, respectively.  The output stage consists
of transistors 10 and 11, and resistances 12 and 13.  The output of
the output stage is fed back to the far-end 16.

      In order to terminate the far-end 16 with Zo, the output stage
has resistances 12 and 13 in addition to transistors 10 and 11, and
these resistances are used to make the termination impedance equal to

Zo.  Assuming that the impedances in the ON state of transistors 10
and 11 are very low, resistances 12 and 13 actually are equal to Zo.
This assumption is applied to the succeeding description.

      Now, the operation of the terminating circuit is described.  It
is noted that different input/output characteristics are selected for
inverters 1 and 2, so that transistors 10 and 11 never become ON at
the same time.  During steady state, the source voltage is kept 0v.
Outputs of inverters 1 and 2 are Vdd so as to turn off transistor 10
and turn on tr...