Browse Prior Art Database

Safe Device Power Management

IP.com Disclosure Number: IPCOM000104583D
Original Publication Date: 1993-May-01
Included in the Prior Art Database: 2005-Mar-19
Document File: 2 page(s) / 38K

Publishing Venue

IBM

Related People

Inoue, K: AUTHOR [+3]

Abstract

Disclosed is a personal computer system that records the number of times that one of its devices was powered off or entered low power mode, and automatically disables power saving timer for the device or alerts the user, when a predefined threshold has been reached.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 90% of the total text.

Safe Device Power Management

      Disclosed is a personal computer system that records the number
of times that one of its devices was powered off or entered low power
mode, and automatically disables power saving timer for the device or
alerts the user, when a predefined threshold has been reached.

      Access to a peripheral device in question (1) in the Figure is
detected by the access monitor component (2), which causes the
inactivity timer (3) to be reset.  Upon timeout of the timer (3),
which keeps on running till the time specified by the controller (4)
elapses without reset by the access monitor (2) above, the controller
(4) references the number of times the device was powered off or
entered low power mode that is stored in non-volatile memory (5).  If
the value reaches a predefined threshold (such as 90% of the device's
specification tolerance), the controller ignores this timeout and
warns the user through the display unit (6).  If the value is well
below the device's tolerance the controller puts the device in low
power mode, updates the record in non-volatile memory (5), and waits
for next access to the device.  When the device is next accessed, the
controller will restore the device to normal operating mode following
notification from the access monitor, and reset the inactivity timer
(3) to let it run.

     The device control system described above can be either built
into the device itself or implemented in software by using the I/O
trap f...