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Multisequencing a Single Instruction Stream - A Single Register Copy Per Virtual Processing Element Identifier

IP.com Disclosure Number: IPCOM000104611D
Original Publication Date: 1993-May-01
Included in the Prior Art Database: 2005-Mar-19
Document File: 4 page(s) / 122K

Publishing Venue

IBM

Related People

Ekanadham, K: AUTHOR [+4]

Abstract

Multisequencing a Single Instruction Stream (MSIS) is a uniprocessor organization in which a set of processing elements (PE) working in concert execute Segments of the instruction stream. The Segments are either P-Segments, normal uniprocessor instruction stream portions, that are processed in the E-MODE of MSIS and produce Z-Segments, or the Z-Segments that are processed in Z-MODE by MSIS. The main difference between E-MODE and Z-MODE is that during E-MODE each PE sees all instructions in the Segment and executes the ones that are assigned to it, but during Z-MODE, a PE only sees the instructions assigned to it.

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Multisequencing a Single Instruction Stream - A Single Register Copy Per Virtual Processing Element Identifier

      Multisequencing a Single Instruction Stream (MSIS) is a
uniprocessor organization in which a set of processing elements (PE)
working in concert execute Segments of the instruction stream.  The
Segments are either P-Segments, normal uniprocessor instruction
stream portions, that are processed in the E-MODE of MSIS and produce
Z-Segments, or the Z-Segments that are processed in Z-MODE by MSIS.
The main difference between E-MODE and Z-MODE is that during E-MODE
each PE sees all instructions in the Segment and executes the ones
that are assigned to it, but during Z-MODE, a PE only sees the
instructions assigned to it.

      As all PEs see all instructions in E-MODE, each PE can create
the Z-CODE it will require to re-execute the  Segment as a Z-Segment,
the Z-CODE being stored in the Z-CACHE, and associated with
instructions in the Z-CODE are  S-LISTS  and D-LISTS as appropriate.
An S-LIST instructs the PE, in the Z-MODE, that one or more of the
source registers in an instruction assigned to it is set by another
instruction that is executed on another PE, an S-LIST is a receiving
obligation.  The D-LIST instructs the PE in the Z-MODE as to the
names of PEs that require the values of the register(s) that are
being set by an instruction that is assigned to it.  A D-LIST entry
is a sending obligation.

      The set of instructions assigned to a single PE can be further
delineated as THREADS.  A THREAD is a sequence of instructions in the
original conceptual order and a Thread is associated with a register
file which is either real or virtual.  There are no sending or
receiving obligations between instructions within a THREAD and the
THREAD is the smallest unit of aggregation of instructions from a
SEGMENT.

      The sequence of instructions that comprise a THREAD are in
conceptual sequence but THREADS can be interdigitated to form DECODER
STREAMS - the sequence of instructions that are issued by a single
DECODER.  Such a Z-CODE is called Out-Of-Sequence (OOS) Z-CODE.

NOTATION

Let MSIS(&alpha.,&beta.)  denote an MSIS processor with &alpha.  PEs
and providing for &beta.  sets of register files.  The conventional
MSIS would be MSIS(&alpha., &alpha.).

      In what follows the number of PEs will be denoted by &lambda.,
and the number of Virtual PE (PE-ID) will be denoted by &eta.  if the
value is specific.  When we virtualize to an unspecified number of
PE-IDs we will call that number &sigma..

      The ability to virtualize the PE and create PE-IDs allows one
to consider a form of MSIS in which there is only a single processing
element (PE) and a single register file (RF).  The register file
encompasses multiple virtual PE.  Instructions for the PE carry the
PE-ID which identifies the local registers to be used when there are
no S-LISTS and for each instruction with an S-LIST and ability to
...