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Browse Prior Art Database

Rework Pin

IP.com Disclosure Number: IPCOM000104713D
Original Publication Date: 1993-May-01
Included in the Prior Art Database: 2005-Mar-19
Document File: 2 page(s) / 25K

Publishing Venue

IBM

Related People

Braun, R: AUTHOR [+3]

Abstract

For changing the wiring on logic boards, an auxiliary plate 3 carrying rework pins 2 is applied to board 1. For this purpose, pins 2 are soldered through via holes 4 in board 1 and conductive lands 5 to the board's wiring (pin-in-hole technology). Rework pins 2 are provided with an isolation layer 6. For wiring changes, the relevant pin is detached and pulled out of via hole 4. After the soldering tin has been removed from the via hole, a new rework pin is inserted. The new wiring is reliably implemented at high speed through the new isolated pin 2. Both pin 2 and the associated land 5 may be connected further by additional lines 7.

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Rework Pin

      For changing the wiring on logic boards, an auxiliary plate 3
carrying rework pins 2 is applied to board 1.  For this purpose, pins
2 are soldered through via holes 4 in board 1 and conductive lands 5
to the board's wiring (pin-in-hole technology).  Rework pins 2 are
provided with an isolation layer 6.  For wiring changes, the relevant
pin is detached and pulled out of via hole 4.  After the soldering
tin has been removed from the via hole, a new rework pin is inserted.
The new wiring is reliably implemented at high speed through the new
isolated pin 2.  Both pin 2 and the associated land 5 may be
connected further by additional lines 7.