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Multisequencing a Single Instruction Stream Criteria for Optimal Performance of Out Of Sequence Z-Code

IP.com Disclosure Number: IPCOM000104719D
Original Publication Date: 1993-May-01
Included in the Prior Art Database: 2005-Mar-19
Document File: 4 page(s) / 131K

Publishing Venue

IBM

Related People

Ekanadham, K: AUTHOR [+4]

Abstract

MSIS is a uniprocessor organization in which a set of processing elements (PE) working in concert execute Segments of the instruction stream. The Segments are either P-Segments, normal uniprocessor instruction stream portions, that are processed in the E-MODE of MSIS and produce Z-Segments, or the Z-Segments that are processed in Z-MODE by MSIS. The main difference between E-MODE and Z-MODE is that during E-MODE each PE sees all instructions in the Segment and executes the ones that are assigned to it, but during Z-MODE, a PE only sees the instructions assigned to it.

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Multisequencing a Single Instruction Stream Criteria for Optimal Performance of Out Of Sequence Z-Code

      MSIS is a  uniprocessor  organization  in  which  a  set  of
processing elements (PE) working in concert execute Segments of the
instruction stream.  The Segments are either P-Segments, normal
uniprocessor instruction stream portions, that are processed in the
E-MODE of MSIS and produce Z-Segments, or the Z-Segments that are
processed in Z-MODE by MSIS.  The main difference between E-MODE and
Z-MODE is that during E-MODE each PE sees all instructions in the
Segment and executes the ones that are assigned to it, but during
Z-MODE, a PE only sees the instructions assigned to it.

      As all PE see all instructions in E-MODE, each PE can create
the Z-CODE it will require to re-execute the Segment as a Z-Segment,
the Z-CODE being stored in the Z-CACHE, and associated with
instructions in the Z-CODE are S-LISTS and D-LISTS as appropriate.
An S-LIST instructs the PE, in the Z-MODE, that one or more of the
source registers in an instruction assigned to it is set by another
instruction that is executed on  another PE, an S-LIST is a receiving
obligation.  The D-LIST instructs the PE in the Z-MODE as to the
names of PE's that require the values of the register(s) that are
being set by an instruction that is assigned to it.  A D-LIST entry
is a sending obligation.

      The set of instructions assigned to a single PE, can be further
delineated as THREADS.  A THREAD is a sequence of instructions in the
original conceptual order and a Thread is associated with a register
file which is either real or virtual.  There are no sending or
receiving obligations between instructions within a THREAD and the
THREAD is the smallest unit of aggregation of instructions from a
SEGMENT.

      NOTATION - Let MSIS( &alpha., &beta.  ) denote an MSIS
processor with &alpha.  PE's and providing for &beta.  sets of
register files.   The  conventional  MSIS  would  be MSIS(
&alpha.,&alpha.  )

      In what follows the number of PE will be denoted by &lambda.,
and the number of THREADS will be denoted by &eta.  if the value is
known.  When an unknown number of THREADS is visualized the number of
THREADS are parameterized by &sigma..

      OPPORTUNITY - DEFINITION OF MAKESPAN - SCHEDULE LENGTH - Given
the schedule for an instruction sequence, which achieves the shortest
possible overall length, the smallest value of the maximum decode
time for any instruction is called MAKESPAN or, equivalently, the
Maximum Dependency Time (MDT) of the entire sequence.

      DEFINITION OF SCHEDULE WIDTH - The schedule that achieves the
makespan can be thought of as a series of lines.  The line index
corresponds to the earliest cycle of decode of each of the
instructions on the line.  This is also called the Decode Dependency
of the Instruction (DDI).  The width of a line is the is the number
of instructions with the same DDI...