Browse Prior Art Database

Multiple Address Space Facility

IP.com Disclosure Number: IPCOM000104720D
Original Publication Date: 1993-May-01
Included in the Prior Art Database: 2005-Mar-19
Document File: 2 page(s) / 57K

Publishing Venue

IBM

Related People

Bruetsch, BJ: AUTHOR

Abstract

Multiple address spaces generate directory look-aside tables (DLATs) that must be purged after use. This purging is reduced by a segment table origin (STO) compare that differentiates DLAT entries in a system that contains address translations in a DLAT for two different address spaces, primary and secondary. With multiple address space facility (MASF), translations for primary and secondary spaces can be in the DLAT concurrently with translations for up to fifteen users by adding hardware.

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Multiple Address Space Facility

      Multiple address spaces generate directory look-aside tables
(DLATs) that must be purged after use.  This purging is reduced by a
segment table origin (STO) compare that differentiates DLAT entries
in a system that contains address translations in a DLAT for two
different address spaces, primary and secondary.  With multiple
address space facility (MASF), translations for primary and secondary
spaces can be in the DLAT concurrently with translations for up to
fifteen users by adding hardware.

      A STO array 1 is loaded with load STO microword that is a new
microword for MASF.  The array 1 has seventeen elements each of which
are composed of a status bit and a 16-bit STO field.  Element 0 is
for the primary space and elements 1-15 contain STOs for up to
fifteen users.  Element 16 is for the secondary space.

      A STO entry in the DLAT 2 is loaded during "LOAD DLAT" and
compared to the STO array 1 on virtual accesses.  DLAT HITS now
require an additional match between STO in the STO array 1 and STO in
DLAT 2.  The status of the STO array 1 must be valid.

      Registers for addressing the STO array 1 and auxiliary storage
are the Base One External Register (B1 REG) 3 which addresses the STO
array 1 when storage address register (SAR) 1 is used in the storage
word.  Base Two External Register (B2 REG) 4 addresses the STO array
1 when SAR 2 is used in the storage word.  These registers can also
be destined b...