Browse Prior Art Database

Cache Set Associative Algorithm

IP.com Disclosure Number: IPCOM000104731D
Original Publication Date: 1993-May-01
Included in the Prior Art Database: 2005-Mar-19
Document File: 1 page(s) / 23K

Publishing Venue

IBM

Related People

Ferrarini, S: AUTHOR [+6]

Abstract

Disclosed is the use of a cache set predictive algorithm to do zero- wait-state reads with multiple set associative caches. The predictive algorithm provides a best guess at which cache set is being accessed for any given address. If the guess is correct, a zero-wait-state read is performed; if it is incorrect, a one-wait-state read is performed.

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This is the abbreviated version, containing approximately 100% of the total text.

Cache Set Associative Algorithm

      Disclosed is the use of a cache set predictive algorithm to do
zero- wait-state reads with multiple set associative caches.  The
predictive algorithm provides a best guess at which cache set is
being accessed for any given address.  If the guess is correct, a
zero-wait-state read is performed; if it is incorrect, a
one-wait-state read is performed.

      The algorithm perferably predicts that the set last accessed by
a cache hit read operation will be accessed again.  In internal
register keeps track of which cache set is accessed in this way.
When a current read goes to the same set as the previous read, a
zero-wait- state cycle is run from cache.

      Performance modeling has shown that, with a two-way associative
cache, this method is correct over 90 percent of the time.  For
comparison, a pure guessing method would be correct only 50 percent
of the time.

Anonymous.