Browse Prior Art Database

Laser Fuse Programmable Input Level Receivers

IP.com Disclosure Number: IPCOM000104839D
Original Publication Date: 1993-Jun-01
Included in the Prior Art Database: 2005-Mar-19
Document File: 4 page(s) / 112K

Publishing Venue

IBM

Related People

Ciraula, MK: AUTHOR [+3]

Abstract

VLSI chips require specific logic input levels that are characteristic of the system environment(s) in which they are to be used. The two most common are CMOS (1.5V and 3.5V) and TTL (0.8V and 2.0V). When designing chips, the interface circuits, known as on-chip receivers or OCRs, engineers must consider which set of logic input levels will be required in the system environment. When multiple system environments are expected with potentially differing logic input level requirements, designers must provide the option for different logic levels on the VLSI chip. Typically, these different levels are programmable using one or two processing mask level changes. However, this creates two problems:

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Laser Fuse Programmable Input Level Receivers

      VLSI chips require specific logic input levels that are
characteristic of the system environment(s) in which they are to be
used.  The two most common are CMOS (1.5V and 3.5V) and TTL (0.8V and
2.0V).  When designing chips, the interface circuits, known as
on-chip receivers or OCRs, engineers must consider which set of logic
input levels will be required in the system environment.  When
multiple system environments are expected with potentially differing
logic input level requirements, designers must provide the option for
different logic levels on the VLSI chip.  Typically, these different
levels are programmable using one or two processing mask level
changes.  However, this creates two problems:

1.  multiple separate sets (or subsets) of processing masks are
    required, and
2.  chips must be stockpiled in distinct formats.  For discussion
    purposes, the two most common interface levels, TTL and CMOS,
    will be presented in this article.  However, it should be noted
    that the concepts presented can be extended to most any interface
    level requirement.

      This article describes a means to provide input-level
programming from CMOS to TTL or TTL to CMOS without the use of
processing mask changes using laser fuses.  Consequently, the
resulting chip designs are more versatile for manufacturing and
system designers, producing multiple input levels from a single
processing mask set.  Therefore, chip stockpiling can be done without
regard to input-level requirements.

      On-chip receivers designed in CMOS technologies can be made to
switch at various voltage levels by changing the ratio of input
pull-up (P-FET) and pull-down (N-FET) devices.  CMOS logic input
levels are obtained by setting the switching level somewhere between
1.5 and 3.5 volts, usually at 2.5V (mid-way).  Similarly, TTL input
levels are created by setting the switching voltage between 0.8 and
2.0 volts.  Additionally, hysteresis may be added to the OCR
circuitry to provide additional noise immunity, which is accomplished
by adding feedback latches,...