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Pulse Shaping and Pulse-Width Reduction in Medium-Speed VLSI Testers

IP.com Disclosure Number: IPCOM000104934D
Original Publication Date: 1993-Jun-01
Included in the Prior Art Database: 2005-Mar-19
Document File: 4 page(s) / 115K

Publishing Venue

IBM

Related People

Gerth, F: AUTHOR [+2]

Abstract

This article describes a concept for producing shorter pulses with a higher repetition rate and shaping pulses on medium-speed VLSI testers. For this purpose, an XOR circuit and a triple-throw electronic relay are used which allow normal operation with all tester channels being available and fast operation where up to half of the channels may run with short pulses. The XOR circuit which can be arranged closely adjacent to the device under test (DUT) also shapes the pulses coming from the tester.

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Pulse Shaping and Pulse-Width Reduction in Medium-Speed VLSI Testers

      This article describes a concept for producing shorter pulses
with a higher repetition rate and shaping pulses on medium-speed VLSI
testers.  For this purpose, an XOR circuit and a triple-throw
electronic relay are used which allow normal operation with all
tester channels being available and fast operation where up to half
of the channels may run with short pulses.  The XOR circuit which can
be arranged closely adjacent to the device under test (DUT) also
shapes the pulses coming from the tester.

      High-pin VLSI testers are presently used to test complex
combinatorial and sequential logic circuits in VLSI devices.  Such
testers, which are extremely expensive, should have a service life of
many years which may be noticeably reduced by the technological
advance of the DUTs.

      Two very important factors of a VLSI tester are the obtainable
minimum cycle time and the minimum pulse width that can be generated.
Although the minimum cycle time indicates the capabilities of a
tester, the number of pulses applied to a DUT's pin within a cycle
and the minimum pulse width are the key parameters for true AC
testing very fast hardware.  Therefore, it is important to provide a
concept for generat ing short pulses with a high repetition rate
without having to invest in completely new test equipment every time
technological advances occur.

      A digital XOR circuit capable of driving a transmission line is
the very basis of the presented concept.  It permits the output to
change logical levels whenever one of the two inputs makes a
transition.  Fig.  1 shows the waveforms of the inputs with the
corresponding output.

      When inputs A and B are connected to tester channels and output
C to a pin of the DUT, there are few advantages over the normal
situation where every tester channel is directly connected to a DUT's
pin.  When input B = 0, output C will follow input A (see CYCLE M in
Fig. 1).  This also happens when tester channel A is directly
connected to the DUT.  The length of the pulse is limited by the
ability of the tester to produce two edges in a short time.  The
number of pulses in a cycle also depends on whether the tester is
able to store (and generate) all edges.  The minimum cycle time is
determined by the tester clock.

      However, in cycle N (Fig. 1), output C provides pulses whose
minimum lengths are only limited by the response time of the XOR
circuit.  Delta t between the transitions of inputs A and B is
smaller when the XOR circuit has a shorter propagation delay.  This
improves as faster technology products...