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Browse Prior Art Database

Multisequencing a Single Instruction Stream - Use of Tags

IP.com Disclosure Number: IPCOM000104989D
Original Publication Date: 1993-Jun-01
Included in the Prior Art Database: 2005-Mar-19
Document File: 2 page(s) / 84K

Publishing Venue

IBM

Related People

Ekanadham, K: AUTHOR [+3]

Abstract

MSIS implemented on Multiple Processing Elements (PEs) has a deficit at Segment Switches because all instructions in the PE ZCODE partition must be completed prior to the Segment Switch. This is rectified by the use of TAGS.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Multisequencing a Single Instruction Stream - Use of Tags

      MSIS implemented on Multiple Processing Elements (PEs) has a
deficit at Segment Switches  because  all  instructions  in  the  PE
ZCODE partition  must  be  completed  prior to the Segment Switch.
This is rectified by the use of TAGS.

Location of TAGS in MSIS - A Retrospective on Multiple PEs

      The  formulation of MSIS in terms of multiple PEs each with its
own instruction sequence, SLIST/DLIST, and  EMODE/ZMODE, seems  to
lack TAGS.  Each PE has its set of register files, its own and one
for each other PE in the  configuration  and referencing of registers
is handled via validity bits within the  registers  at various stages
but there does not seem to be a prima facie  need  for  TAGS  as
they  appear  in  DIG designs.  TAGS  appear  via a succession of
modifications to the basic design as we allow the decoder streams to
maintain instructions  out  of  sequence,  thereby  creating  threads
within  decoder  streams.  The merging of the PEs into a HEM with
multiple  decoders  creates  a  need  for  a  means  to distinguish
instructions from different decoder threads.

      None  of  these aspects of instructions creates the need for
TAGS as much as the handling of  the  transitions  between segments.
It is only as the addition of the segment.index and the path.index
that the clear and present need for  tags is required.

      Re-examining  the  design employed in MSIS, the TAG issuance
takes the place of the MODE indicator.  An instruction  dealt with  a
TAG is a ZMODE instruction.  The tag need not specify a register set
as  that  register  set  is  defined  by  the implementation.   If
instructions  are   to   be   handled out-of-sequence as in the case
of merging  the  instructions across  a SEGMENT SWITCH (SS), then
tags will be required and additional register files must exist.

      The  extensions  of  the  simple  form  of  MSIS  to improve
performance as relates to SS already involves the concept of
multiplicities of register files which is what TAGS support.

      The absence of TAGS within MSIS is  thus  explained  as  the
mode  specifics...