Browse Prior Art Database

Structure for Supporting Thin Silicon Films

IP.com Disclosure Number: IPCOM000105013D
Original Publication Date: 1993-Jun-01
Included in the Prior Art Database: 2005-Mar-19
Document File: 2 page(s) / 89K

Publishing Venue

IBM

Related People

Cuomo, JJ: AUTHOR [+3]

Abstract

Disclosed is a method of producing thin (<= 1000A) silicon on insulator (SOI) films.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 57% of the total text.

Structure for Supporting Thin Silicon Films

      Disclosed is a method of producing thin (<= 1000A) silicon on
insulator (SOI) films.

      The thinnest Si film on presently available commercial bonded
SOI wafers is >=  2 &mu..  Although such SOI layers suitable
for high voltage rectifiers and power transisters, these are quite
inadequate to fabricate fully depleted Si-MOSFETs which require SOI
thicknesses of <=  1000 A

      The commercial bonded SOI wafers are made by bonding two Si
wafers (a handle wafer and a device wafer) with each having thermal
oxide or only one (typically the handle wafer) having a thermal
oxide.  The device silicon wafer is then polished away, leaving only
a few microns of the original silicon.  The present mechanical
polishing can not provide a layer of 1000A  thickness with a
uniformity 3% which is needed.  Proposed is the use of p++ silicon as
an etch stop when polishing the original silicon wafer away.
However, the high temperature process (>=  1000 ºC for a
few hours) used for commercial wafer bonding would cause the boron in
the p++ etch stop to diffuse away and thus degrade the effectiveness
etch stop as well as thickness control of the SOI layer.

      The proposal is to build the wafer in the form sketched in the
figure.  The device wafer  1 has layer 2 of p++ silicon, layer 3 of
intrinsic silicon, layer 4 of SiO&sub2., and  layer 5 of a few
microns of silicon grown on it by high pressure UHV CVD.  Then, th...