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Planarized Testing Pads for Thin Films in Serial Parallel Process

IP.com Disclosure Number: IPCOM000105056D
Original Publication Date: 1993-Jun-01
Included in the Prior Art Database: 2005-Mar-19
Document File: 2 page(s) / 78K

Publishing Venue

IBM

Related People

Farooq, M: AUTHOR [+5]

Abstract

This technology relies heavily on the critical joining processes by which these separate elements are united to form the final thin film module.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Planarized Testing Pads for Thin Films in Serial Parallel Process

      This technology relies heavily on the critical joining
processes by which these separate elements are united to form the
final thin film module.

      When  the  thin  films  are  built  on  the sacrificial
carrier, the plane pair  structure  should  be  electrically testable
prior to joining.  For this purpose it is desirable to have either a
thick blanket metal layer or a thin (200 A) blanket  layer  with
thick  (1  to 2 micron) pads below the studs which serve as part of
the interconnecting  layer  for electrical  testing.    It  should
be  noted that the 200 A blanket layer is not sufficient for
electrical testing,  but is  required as an ash/RIE stop during the
subsequent ashing to remove the release layer after the release  of
the  thin film  stack  from  the  sacrificial carrier.   The method
of choice is to pattern this layer  into  metal  pads  so  that paths
for  degrees  of moisture and solvent are provided to eliminate metal
blistering.

PROCESS - The desired structure for joining, is described below:

1.  Start with a Pyrex  substrate,  and  apply  the  polymer release
    layer.
2.  Planarize  the surface such that there is a minimum of 5 um
    remaining.
3.  Deposit Cr/Cu/Cr and create pads using a resist sub-etch process.

4.  Overcoat with polymer and polish back to reveal the pads (Fig.
    1).
5.  Deposit thin chrome as a blanket layer.
6.  Apply adhesive
7.  Fabricate the thin film studs and wiring (Fig. 2)...