Browse Prior Art Database

Operation of the Memory Management Process

IP.com Disclosure Number: IPCOM000105062D
Original Publication Date: 1993-Jun-01
Included in the Prior Art Database: 2005-Mar-19
Document File: 2 page(s) / 65K

Publishing Venue

IBM

Related People

Rechtschaffen, R: AUTHOR

Abstract

A Memory Management Process (MMP) can manage the set of lines held exclusive within the L1-caches in conjunction with a software lock. The MMP, using perspective of the L2-CACHE, correlates lock acquisition with exclusivity via a correlation of addresses. The MMP relinquishes exclusivity when the lock is released.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Operation of the Memory Management Process

      A Memory Management Process (MMP) can manage the set of lines
held exclusive within the L1-caches in conjunction with a software
lock.  The MMP, using perspective of the L2-CACHE, correlates lock
acquisition with exclusivity via a correlation of addresses.  The MMP
relinquishes exclusivity when the lock is released.

      Start with the assumption that the MMP has identified the set
of instructions that perform the TAKE LOCK and RELEASE LOCK via an
analysis that examples the pattern of usage of such events that
relate to COMPARE (DOUBLE) AND SWAP.  The overall memory hierarchy is
a set of L1-caches managed via the protocol WTWAX and supported by a
single logical L-2 CACHE.  All relevant aspects of the operations of
the Compare Double & Swap  and WTWAX are summarized below.

o   WTWAX
    -   all stores are written through the L1 cache to the L2 (WT),
    -   all lines that are stored into by the processors must be
        allocated (WRITE ALLOCATE), and
    -   all lines written into must be held exclusively (X).

o   C(D)S is supported via a S&I

          The result of the S&I is to update the memory (S) location
    accesses and invalidate (I) all cache copies of the line.  Within
    a WTWAX system the S&I operation allows for the correct update of
    the L2 without any requirement that said line be in the cache of
    the issuing processor let alone held EXCLUSIVE when the lock is
    released.  However when a lock is taken it is simpler to manage
    close in taking of the lock when it is not held exclusive.  Thus
    with EXCLUSIVITY on lock taking, the issue of tie-breaking for
    close in attempts to acquire the lock is resolved based on...