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Clamp Circuit for Faster Rising Time of High-Speed Amplifier

IP.com Disclosure Number: IPCOM000105135D
Original Publication Date: 1993-Jun-01
Included in the Prior Art Database: 2005-Mar-19
Document File: 2 page(s) / 26K

Publishing Venue

IBM

Related People

Nishiawa, H: AUTHOR

Abstract

Disclosed is a method to improve the switching speed of amplifier. A clamp circuit is placed at the base of the transistor of final stage, in order for the final stage not to saturate deeply.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 100% of the total text.

Clamp Circuit for Faster Rising Time of High-Speed Amplifier

      Disclosed is a method to improve the switching speed of
amplifier.  A clamp circuit is placed at the base of the transistor
of final stage, in order for the final stage not to saturate deeply.

      The circuit inside the dotted line works as follows.  The
voltage at node D is kept constant by D2 and D3, and the voltage at
node B is also kept constant by D1.  Hence the voltage at node C is
also kept constant.  When the darlington transistors Q2 and Q3 are
on, the voltage at node A is higher than the clamp voltage
Vbe(R2/(R1+R2) + 2), then transistor Q1 is off and this clamp circuit
has no influence to the amplifier.  When Q2 and Q3 are off, the
voltage at node A is clamped so that these transistors don't saturate
deeply.  That is, when the output of the first stage changes, Q2 and
Q3 become on immediately without delay.