Browse Prior Art Database

Micro Channel Buffer Card

IP.com Disclosure Number: IPCOM000105160D
Original Publication Date: 1993-Jun-01
Included in the Prior Art Database: 2005-Mar-19
Document File: 2 page(s) / 31K

Publishing Venue

IBM

Related People

Martinez, P: AUTHOR [+2]

Abstract

The Micro Channel* Buffer Card was designed as a way to isolate every key signal and control line on the RISC System/6000* Micro Channel bus. It uses Harris Solid-State switches to buffer the lines; each switch module handles four lines. The card plugs into the Micro Channel slot that would normally be used by the card-under-test (CUT). The logic for the card is powered by the host system. A separate voltage plane provides power to the CUT connector on top but jumpers are provided so that the host system can also power the CUT. Probe pins beneath the top connector are also provided for easy scope or logic analyzer connection to all the Micro Channel lines.

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This is the abbreviated version, containing approximately 100% of the total text.

Micro Channel Buffer Card

      The Micro Channel* Buffer Card was designed as a way to isolate
every key signal and control line on the RISC System/6000* Micro
Channel bus.  It uses Harris Solid-State switches to buffer the
lines; each switch module handles four lines.  The card plugs into
the Micro Channel slot that would normally be used by the
card-under-test (CUT).  The logic for the card is powered by the host
system.  A separate voltage plane provides power to the CUT connector
on top but jumpers are provided so that the host system can also
power the CUT.  Probe pins beneath the top connector are also
provided for easy scope or logic analyzer connection to all the Micro
Channel lines.

      The Harris switches were selected for their fast switch rates
and high power handling capability.  In lab tests performed during
initial testing, the maximum delay encountered for any line was 2.5
ns.  The current handling ability of each module is in the milliamp
range which virtually guarantees that normal use would never damage
the modules.

      The switches are enabled and disabled through the enable line
controlled by a Power-On-Reset circuit built on the card.  +5V CUT
power was used as the gating level to control the switches.  When +5V
CUT is present on the power input, a voltage sense circuit activates
its output line which is distributed throughout the card by several
inverter driver modules.

*  Trademark of IBM Corp.