Browse Prior Art Database

Dynamic Random Access Memory Refresh Method In Triple-Modular-Redundant System

IP.com Disclosure Number: IPCOM000105234D
Original Publication Date: 1993-Jul-01
Included in the Prior Art Database: 2005-Mar-19
Document File: 6 page(s) / 294K

Publishing Venue

IBM

Related People

Blanco, R: AUTHOR [+2]

Abstract

In a triple modular redundant (TMR) system, each rail in the system must operate synchronized to each of the other two rails during normal operation. A 'lock-step' TMR system employing Dynamic Random Access Memories (DRAMs) in which the most common and widely used form of DRAM refresh, 'forced' refresh, is applied requires that DRAM refresh also be synchronized between all TMR rails. This article describes a method in which DRAM refresh is synchronized between TMR rails and may be resynchronized once a TMR rail loses synchronization with its corresponding rails.

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Dynamic Random Access Memory Refresh Method In Triple-Modular-Redundant System

      In a triple modular redundant (TMR) system, each rail in the
system must operate synchronized to each of the other two rails
during normal operation.  A 'lock-step' TMR system employing Dynamic
Random Access Memories (DRAMs) in which the most common and widely
used form of DRAM refresh, 'forced' refresh, is applied requires that
DRAM refresh also be synchronized between all TMR rails.  This
article describes a method in which DRAM refresh is synchronized
between TMR rails and may be resynchronized once a TMR rail loses
synchronization with its corresponding rails.

      Fault-tolerant systems commonly employ a
triple-modular-redundant (TMR) archite cture in which each system or
subsystem is triplicated to protect against hardware failure in a
single 'rail'.  Voting between the output values of each rail is used
to insure fault tolerance.  In the event that the output value of one
rail mismatches that of the corresponding two other rails, the output
value which mismatches is thrown away and the 'good' output value
(upon which the two known 'good' rails agree) is used.

      A TMR system may employ voting to various levels of time
resolution.  It is understood, for example, that a system of three
general-purpose computers employed in a TMR configuration may each
independently compute the solution to a problem, and the voter logic
will wait for a specified interval of time before voting on the
results.  In this case, the processors need not operate totally in
lock-step, as long as the desired answer is computed within a
specified maximum time interval.

      In other TMR systems, processors operate in lock-step; voting
is performed every system cycle.  Design of such TMR syste ms
probably exhibit an order of magnitude greater complexity than a
more-infrequently voted system.

      In a TMR system in which the rails operate in lock-step, memory
system design may become an important consideration.  To our
knowledge, these TMR systems which operate in lock-step employ static
memories, which require no special synchronization between TMR rails.
However, in TMR systems which operate in lock-step and employ Dynamic
Random-Access Memories (DRAMs), synchronization of DRAM refresh
becomes an important consideration.  DRAM refresh is a process which
sequentially accesses all rows of a dynamic memory device.  Each row
access 'refreshes' the charge on a dynamic memory cell, as logically
represented by a capacitor.  Each cell must be refreshed within a
certain interval, typically measures in milliseconds, else the charge
stored in the cell will dissipate and the memory contents will be
lost.  To understand why DRAM refresh must be synchronized between
rails in a TMR system, it is important to review the most commonly
used DRAM refresh methods in non-TMR systems.

o   Interleaved Refresh - DRAM refreshes are 'interleaved' between
    m...