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Floating Point Conditional Instructions for Color Component Saturation in Graphics and Image Applications

IP.com Disclosure Number: IPCOM000105307D
Original Publication Date: 1993-Jul-01
Included in the Prior Art Database: 2005-Mar-19
Document File: 2 page(s) / 67K

Publishing Venue

IBM

Related People

Karim, F: AUTHOR [+4]

Abstract

Programming high-level structures such as if...then...else involve branching and the execution units of the processors usually have to wait until the branch is resolved. For instance, consider a programming segment in C-language.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Floating Point Conditional Instructions for Color Component Saturation in Graphics and Image Applications

      Programming high-level structures such as if...then...else
involve branching and the execution units of the processors usually
have to wait until the branch is resolved.  For instance, consider a
programming segment in C-language.

                          float x, y, val;

                          if (x >  y){
                              val = 2.0;
                          }  else {
                              val = 5.5;
                          }

      The above segment involves branching based on the condition x >
y.  In a multiple execution unit environment, this involves several
cycles of branch penalty.  Superscalar RISC processors have multiple
execution units and implementing such high-level structures as they
are can tie up the execution units waiting for branch resolution.  A
set of four new instructions are developed that give direct access to
the condition codes of the result to avoid this bottle-neck.  These
instructions allow conditional parameter assignment without
branching.  They provide unconditional loading of floating point
registers based on floating point instructions "Executed
Unconditionally" (i.e., without the involvement of the branch unit).

      The four instructions that are introduced in a superscalar
processor are as follows.  The first instruction is "Floating
Condition Select Equal X-form" (fcse) and the format and description
of the instruction are:

                       fcse  FRT, FRA, FRB

If the contents of registers FRA and FRB are equal, -1.0 is placed
into FRT.  Otherwise +1.0 is placed into FRT.  The second instruction
is "Floating Condition Select Less Than X-form" (fcsl) and the format
and description of the instruction are:

                       fcsl  FRT, FRA, FRB

If the contents of register FRA is less than the contents of the
regis ter FRB, -1.0 is placed into...