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Browse Prior Art Database

Compute Sign Magnitude for Integer to Float Conversion

IP.com Disclosure Number: IPCOM000105323D
Original Publication Date: 1993-Jul-01
Included in the Prior Art Database: 2005-Mar-19
Document File: 2 page(s) / 71K

Publishing Venue

IBM

Related People

Findley, RL: AUTHOR [+5]

Abstract

The conversion of a Fixed-Point integer to a Floating-Point single precision number often requires specialized hardware or a lengthy sequence of instructions. Devised is a method which utilizes a minute amount of specialized hardware and a shortened instruction stream to minimize both silicon area and instruction latency.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Compute Sign Magnitude for Integer to Float Conversion

      The conversion of a Fixed-Point integer to a Floating-Point
single precision number often requires specialized hardware or a
lengthy sequence of instructions.  Devised is a method which utilizes
a minute amount of specialized hardware and a shortened instruction
stream to minimize both silicon area and instruction latency.

      The conversion of Fixed-Point integers to IEEE Floating-Point
numbers generally requires either dedicated hardware or a lengthy
sequence of Fixed-Point and Floating-Point instructions.

      Special hardware in the Fixed-Point unit dedicated to
performing the conversion is very costly in terms of silicon area.
The additional layout area required may be prohibitive depending upon
the chip area available.  The conversion may, however, be done
without any special hardware using the instruction set, but the cost
in terms of the number of instructions (and thus cycles) required may
be great.  Thus, the tradeoff between silicon area and speed is
evident once again.

      The method used in the implementation of the RISC System/6000*
is shown below to illustrate how the conversion is done without
special hardware.  Eight instructions are required in the conversion.
In the example, it is assumed that the integer to be converted is in
register 'R3'.

Cycle     Instruction
  1       cau    R0, 0x4330  (load hex constant 4330 into GPR)
  2       xoriu  R3, 0x8000  (invert the sign bit)
  3       st     R0, WA      (store the constant to memory)
  4       st     R3, WA+1    (store R3 to the adjacent memory
location)
  5       lfd    F0, WA      (load both words into the FPR)
  6       lfd    F1, 0x43300000 80000000  (load predefined constant )
  7       fs     F0, F1      (subtract, F0=F0-F1)
  8       frsp   F1, F0      (round to a single-precision number)

     A method of converting integers to single-precision
Floating-Point numbers has be...