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Browse Prior Art Database

Automating Hierarchical Compilation for Simulation

IP.com Disclosure Number: IPCOM000105359D
Original Publication Date: 1993-Jul-01
Included in the Prior Art Database: 2005-Mar-19
Document File: 2 page(s) / 51K

Publishing Venue

IBM

Related People

Garcia Jr, SE: AUTHOR

Abstract

Disclosed is a computer program for automating the hierarchical compilation of DSL/I logic structures for MLDVS simulation. When invoked against a DSL/I structure, this program, called ADESMAKE, systematically traverses the structure to determine its component blocks. These blocks are compiled as necessary, and the entire structure is linked together to create a corresponding MLDVS model for logic simulation. To minimize execution time and to eliminate unnecessary usage of the host system, logic blocks having up-to-date compiler files are not recompiled during this process.

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Automating Hierarchical Compilation for Simulation

      Disclosed is a computer program for automating the hierarchical
compilation of DSL/I logic structures for MLDVS simulation.  When
invoked against a DSL/I structure, this program, called ADESMAKE,
systematically traverses the structure to determine its component
blocks.  These blocks are compiled as necessary, and the entire
structure is linked together to create a corresponding MLDVS model
for logic simulation.  To minimize execution time and to eliminate
unnecessary usage of the host system, logic blocks having up-to-date
compiler files are not recompiled during this process.

      The DSL/I logic design system supports the construction of
hierarchical logic structures composed of components existing as
files in the computer environment hosting the design system.  Before
a DSL/I structure can be linked for logic simulation, all its
component logic blocks must first be compiled.

      ADESMAKE is a small, code-efficient program, exploiting
recursive programming techniques to traverse the tree-like data
configuration of DSL/I structures.  The following pseudocode
describes its fundamental operation:

  ADESMAKE(input_file, flag)
    REACCESS [refresh file system image]
    Resolve input_file filetype [preference: 1-given, 2-DESSRC,
3-BEHSRC]
    IF input_file is a design block or structure [DESSRC]
THEN BEGIN
      Parse input_file for file header
      IF input_file is a design bl...