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High-Performance Intrinsic Bipolar Transistor

IP.com Disclosure Number: IPCOM000105402D
Original Publication Date: 1993-Jul-01
Included in the Prior Art Database: 2005-Mar-19
Document File: 6 page(s) / 125K

Publishing Venue

IBM

Related People

Hsu, CH: AUTHOR [+4]

Abstract

A self-aligned high-performance intrinsic bipolar transistor is realized by utilizing polish and sidewall techniques. Compared with the conventional double-poly bipolar transistors, this intrinsic bipolar transistor is about 2 times faster in the low-power application of ECL circuits and able to pump 2 times more current for the same transistor area.

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High-Performance Intrinsic Bipolar Transistor

      A self-aligned high-performance intrinsic bipolar transistor is
realized by utilizing polish and sidewall techniques.  Compared with
the conventional double-poly bipolar transistors, this intrinsic
bipolar transistor is about 2 times faster in the low-power
application of ECL circuits and able to pump 2 times more current for
the same transistor area.

      Current-driving capability and extrinsic parasitic capacitances
are two of the key issues in designing high-performance bipolar
transistors.  In the conventional design, pumping more current always
requires a larger parasitic capacitances (collector-substrate and
extrinsic collector- base).  Therefore, a bipolar transistor which
can pump more currnt with smaller parasitic capacitances becomes
crucial in designing high- performance bipolar circuits.

      This high-performance intrinsic bipolar transistor is intended
to reduce the extrinsic capacitances and resistances which limit the
transistor performance in the conventional bipolar devices.  A fully
self-aligned intrinsic bipolar structure is realized by utilizing
polish and sidewall techniques.  Since the emitter region is
surrounded by the ingrinsic base and collector regions, the collector
current flows three-dimensionally, and thus the effective emitter
area increases.  As a result, the same collector current can be
supplied by a smaller transistor area, which enhances the circuit
performance and also increases the chip density.

      In principal, this device has no extrinsic base-collector
capacitances.  Therefore, the thickness of the collector layer can be
reduced, which implies the reduction of the collector resistance.
Since the intrinsic bipolar transistor is symmetrical and is
silicided, the collector resistance is further reduced to the
minimum.

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