Browse Prior Art Database

Input Locking for an Integrated (Single) Frame Buffer

IP.com Disclosure Number: IPCOM000105423D
Original Publication Date: 1993-Jul-01
Included in the Prior Art Database: 2005-Mar-19
Document File: 2 page(s) / 89K

Publishing Venue

IBM

Related People

Chen, I: AUTHOR [+3]

Abstract

Disclosed is an input lock access mechanism for an integrated (single) frame buffer and is of XGA, in particular. The access mechanism, transparent to users, involves manipulation of lock bits, and data integrity.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Input Locking for an Integrated (Single) Frame Buffer

      Disclosed is an input lock access mechanism for an integrated
(single) frame buffer and is of XGA, in particular.  The access
mechanism, transparent to users, involves manipulation of lock bits,
and data integrity.

      In reference to the source color compare in the Figure, a lock
bit of an address is generated as a result of the compare between the
graphics data of the address and a preprogrammed color code or index
(chroma-keying).  The lock bit is set to "1", if they match, and "0",
otherwise.  The compare is performed on the fly during each memory
write to the (pixel) frame buffer.  A separate lock bit buffer (from
the frame buffer) enables a simultaneous update of graphics data and
lock bits.

      Due to the sharing (or integration) of the frame buffer for
both graphics and video data, a data inconsistency can develop if the
video controller refers to an out-of-date copy of lock bits.  To
insure data integrity, a policy is assumed that graphics data has
priority over the video data in case of inconsistency.  For each
memory write of graphics data, the inconsistency (Figure) can be
detected by checking whether or not,

1.  Its address falls in the same range to which the local copy of
lock bits ref
2.  Its data do not match (or its associated lock bit is being
updated to "0").

If both condition 1 and 2 are satisfied, the updating of video will
be then void.  As a note, the information of current address range of
lock bits (whose data has been kept locally by a video controller) is
constantly updated and stored in min-max registers for comparators of
high and low limits.

      Such an input lock access mechanism incorporated helps lower
the cost of a display system, while featuring the compatibility and
flexibility.  The lower cost is ach...