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Shared/Exclusive Latch Serialization by Obligation Passing

IP.com Disclosure Number: IPCOM000105437D
Original Publication Date: 1993-Aug-01
Included in the Prior Art Database: 2005-Mar-19
Document File: 4 page(s) / 146K

Publishing Venue

IBM

Related People

Greenspan, SJ: AUTHOR [+2]

Abstract

Disclosed is a latching facility that provides serialization of shared and exclusive ownership of resources. The method manages the queue of requests on a FIFO (First In First Out) basis allowing for an unlimited number of shared owners and an unlimited number of waiters. The method provides full concurrency for adding and deleting shared owners, without using a lockout mechanism when there are no outstanding exclusive requests. The latching method also provides for recovering of the storage used for elements that represented owners that have released ownership when the element is the first element on the owner queue without a lockout mechanism.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 38% of the total text.

Shared/Exclusive Latch Serialization by Obligation Passing

      Disclosed is a latching facility that provides serialization of
shared and exclusive ownership of resources.  The method manages the
queue of requests on a FIFO (First In First Out) basis allowing for
an unlimited number of shared owners and an unlimited number of
waiters.  The method provides full concurrency for adding and
deleting shared owners, without using a lockout mechanism when there
are no outstanding exclusive requests.  The latching method also
provides for recovering of the storage used for elements that
represented owners that have released ownership when the element is
the first element on the owner queue without a lockout mechanism.  In
addition this method provides a tailorable control mechanism to
recover storage used for elements that represented owners that have
released ownership and are not the first element on the owner queue.

      Each latch consists of a queue of elements which represent
latch holders (holder queue), a queue of elements which represents
those waiting for the latch to become available (waiter queue), and a
count of elements on the holder queue waiting for deletion.  The
header of the latch holder queue consists of a pointer to the first
element on the queue, a sequence number and 4 bits of control
information.  The sequence number is incremented whenever elements
are deleted from the queue.  It is not incremented when adding
elements to the queue.  The control information is used to indicate:

o   that there are waiters (W).  This bit is turned on when there are
    any elements on the waiter queue and turned off when all of the
    elements on the waiter queue are dequeued.
o   that the holder queue is being processed synchronously (QP).
    This bit is turned on before doing synchronous queue processing
    and turned off when it is complete.
o   that a latch release occurred while the holder queue was being
    processed synchronously (QPC).  This bit is turned on when a
    latch release occurs and the QP bit is on.  It is turned off when
    synchronous queue processing is complete.
o   that the latch is held exclusive (E).  This bit is turned on when
    an element representing an exclusive latch obtain is added to the
    holder queue and turned off when the latch is released.  There
    can only be one element on the holder queue when this bit is on.

NOTE:  The entire header of the latch holder queue must be adjacent
in storage so that one atomic instruction (Compare Double and Swap)
can be used to update all of the information simultaneously.  This
atomic instruction must compare the contents of the storage to be
modified with a given value and only update the storage location if
the contents and the given value match.  All changes to the latch
header MUST be made with atomic instructions which serialize across
processors.

      Each element on the holder queue...