Browse Prior Art Database

Self-Aligning Sample Cleaver

IP.com Disclosure Number: IPCOM000105503D
Original Publication Date: 1993-Aug-01
Included in the Prior Art Database: 2005-Mar-20
Document File: 2 page(s) / 46K

Publishing Venue

IBM

Related People

Reihl, B: AUTHOR [+2]

Abstract

Large areas of semiconductor surfaces are a prerequisite for very-large scale integrated circuits, laser diode fabrication, photo-cathodes, etc. In all cases the semiconductor surfaces have to be atomically clean in an ultra-high-vacuum (uhv) surroundings. In case of wafers this can be achieved by ion etching and annealing, which however is restricted to the (100) and (110) of Ge and Si and the (100) and (111) surfaces of III-V compounds, e.g., GaAs or InP. To obtain clean group VI (111) or III-V (110) surfaces only cleavage in uhv may be employed. For areas of 5*5 mm sup 2 or larger the step density is becoming a problem. In order to minimize it, it is necessary to cleave along certain crystallographic directions, i.e., lbrk 2 bar 11rbrk for group VI and [001] for III-V's.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 79% of the total text.

Self-Aligning Sample Cleaver

      Large areas of semiconductor surfaces are a prerequisite for
very-large scale integrated circuits, laser diode fabrication,
photo-cathodes, etc. In all cases the semiconductor surfaces have to
be atomically clean in an ultra-high-vacuum (uhv) surroundings.  In
case of wafers this can be achieved by ion etching and annealing,
which however is restricted to the (100) and (110) of Ge and Si and
the (100) and (111) surfaces of III-V compounds, e.g., GaAs or InP.
To obtain clean group VI (111) or III-V (110) surfaces only cleavage
in uhv may be employed.  For areas of 5*5 mm sup 2 or larger the step
density is becoming a problem.  In order to minimize it, it is
necessary to cleave along certain crystallographic directions, i.e.,
lbrk 2 bar 11rbrk
 for group VI and [001] for III-V's.  But even more severe is the
mechanical strain onto the sample rods during cleavage.  It can be
avoided by using the self aligning sample cleaver described below and
in the Figure.

      The semiconductor sample (1) is mounted in sample holder (2)
described elsewhere (TDB 32, 247 (1990)), after it has been oriented
by x-ray diffraction to better than 0.5º  in all directions.
This sample holder allows the sample rod to rotate and tilt, and
therewith enable the self alignment described below.  Sample (1) with
notches (3) is then adjusted by transfer rod (4) between knife (5)
and anvil (6).  The anvil is rounded to allow for self alignment of
the sam...