Browse Prior Art Database

Maintaining Data Integrity In Compression/Decompression Devices

IP.com Disclosure Number: IPCOM000105688D
Original Publication Date: 1993-Aug-01
Included in the Prior Art Database: 2005-Mar-20
Document File: 4 page(s) / 122K

Publishing Venue

IBM

Related People

MacLean, NH: AUTHOR [+3]

Abstract

The requirements forever increasing throughput and transmission rates on high performance peripheral storage subsystems dictate a parallel architecture for the data compaction hardware. Described is a data integrity system by checking before and after each of the processes such that the input data steam can be split, compacted or decompacted, then merged at a data rate equal to the number of compaction hardware units times the data rate provided by each, while maintaining data integrity throughout.

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This is the abbreviated version, containing approximately 44% of the total text.

Maintaining Data Integrity In Compression/Decompression Devices

      The requirements forever increasing throughput and transmission
rates on high performance peripheral storage subsystems dictate a
parallel architecture for the data compaction hardware.  Described is
a data integrity system by checking before and after each of the
processes such that the input data steam can be split, compacted or
decompacted, then merged at a data rate equal to the number of
compaction hardware units times the data rate provided by each, while
maintaining data integrity throughout.

      Four hardware compaction units (COMPs) are utilized.  During a
channel write operation, each compaction unit compacts data received
from the host processor via the Upper Storage and Controls and
transfers the compacted data stream to Lower Storage and Controls for
transfer to the media.  During a channel read operation each
compaction unit decompacts data received from the Lower Storage and
Controls, after having been read from the media, transferring the
original decompacted data stream to the host processor via Upper
Storage and Controls.

1.  Write Process:  (Figure)

    a.  Each COMP receives the entire data stream (DS) from the host
        and generates a CRC (CRC0) on the original data.

        At the end of data transfer of the DS a CRC is sent to all
        the COMPs and all CRC0s are compared with the CRC received
        from the host to verify that the DS was received correctly.

    b.  Each COMP generates a CRC (CRC1) only on the packets it
        processes from the DS.  Each data packet is stored in the
        Upper Storage for compaction by the COMP.

    c.  Each COMP compacts its packets, and sends the output to a CRC
        (CRCA) and also stores the compacted Packets (CPs) in the
        Lower Storage, and also through a speed matching buffer to
        the inverse process which decompacts the packets, recreating
        the original data packets.  A CRC (CRC2) is generated on the
        decompacted packets.

        At the end of data transfer, each COMP compares its CRC1 to
        CRC2 to verify that each COMP has compacted its respective
        packets correctly.  In this way no byte by byte comparison of
        the original packets to the decompacted packets from the
        decoder is required for data integrity.  This would otherwise
        require additional buffering of the decompacted packets from
        the decoder along with comparator hardware and controls.
        Also, throughput would be greatly reduced to allow time for
        the separate comparing of the original packets from the Upper
        Storage to each decompacted packets from the decoder, held in
        the added buffer.

    d.  As transmission of the CPs to the media is occurring, a...