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Dynamic Random Access Memory Reference Cell Initialization

IP.com Disclosure Number: IPCOM000105721D
Original Publication Date: 1993-Sep-01
Included in the Prior Art Database: 2005-Mar-20
Document File: 2 page(s) / 55K

Publishing Venue

IBM

Related People

Butler, E: AUTHOR [+4]

Abstract

Two methods are described by which dynamic random-access memory (DRAM) chips may be initialized within the first active cycle after power-on. Existing signal lines are used to charge DRAM reference cells very quickly to the desired initialization voltage. The first active cycle is valid for writing data into the chip and is not considered to be an initialization cycle.

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Dynamic Random Access Memory Reference Cell Initialization

      Two methods are described by which dynamic random-access memory
(DRAM) chips may be initialized within the first active cycle after
power-on.  Existing signal lines are used to charge DRAM reference
cells very quickly to the desired initialization voltage.  The first
active cycle is valid for writing data into the chip and is not
considered to be an initialization cycle.

      The figure represents one typical DRAM cell with I/O lines that
are shared with other cells.  In normal operation, PFET TP11 is
turned off.  Nodes RC and RCN reach the proper operating voltage of
2.3 volts only after two or more active cycles following power-on.
The node voltages at RC and RCN are the voltages that appear across
reference cell capacitors CR2 and CR1, respectively.  Line RBO is
normally used to bias the reference cells during signal margin
testing when signal BI3N is active low and the bias on RBO is
supplied from a previously set voltage.

      One method for reducing DRAM initialization time is to activate
RBO and BI3N during the first active cycle after power-on.  If during
the first active cycle BI3N is set at its active low state, and a
bias of 2.3 volts is connected to RBO, devices TP11, TP4 and TP3 will
allow both CR2 and CR1 to charge very quickly to 2.3 volts.  By the
end of the first active cycle, BI3N can return to its default
inactive state to turn off TP11 and isolate CR1 and CR2 from RBO...